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  1. FPGA board with 2 EP4S530/340/820
  2. DDR2-SDRAM on Cyclone III DSP Kit (no NIOS)
  3. Compiled SOF file doesn't work with Linux reference design for 3c120
  4. Generate SOF file
  5. Off Chip Memory Issue (DSP Dev board)
  6. DM9000A of DE2_NET doesn't even intialize in Quartus 9.0
  7. FPGA Newbie with a DE3 Board trying to use hyperterminal
  8. Dev Board and IP recomendation..Pls Help.
  9. Dev board with rs232 comm...other than DE2 higher
  10. SDRAM PLL phase adjustment DE2-70
  11. TSE on Stratix III dev. kit - cant fit rx_clk
  12. Cheapest niosII compatible dev-board (student discount?)
  13. To run simple socket server program on NIOS II, stratixII Dev kit
  14. Writing Control Panel on PC
  15. an374 "Video over IP" reference design on NEEK
  16. Windows XP Command Shell quits?
  17. Need mechanical specs for Stratix IV GX kit
  18. TSE connection problem
  19. newbie help with WM8731 codec
  20. The problem in useing SignalTapII(Quartusii9.1 web )
  21. Question about LVDS channels on the HSMC port
  22. Not able to display on NIOS II dev kit
  23. NEEK application selector
  24. MAX II PCI Development Kit
  25. MAX II PCI Development Kit
  26. max 7000 dev kit?
  27. Writing to SRAM/SDRAM on DE-2 board ?
  28. Byteblaster compatible expresscard parallel ports
  29. DE2 Control Panel in Linux
  30. My Extra NEEK
  31. Zentel A3S56D40ETP-G5 DDR-Ram Timing Problems
  32. How to run crystal??
  33. cycloneIII_3c25_start_niosII_standard.sof
  34. dev. kit
  35. Help on DE2_TV demo code
  36. Orentation of EPCS eeprom on BeMicro eval board
  37. 10 Gigabit Ethernet Kit
  38. Application selector HW only load
  39. Connect two DE2 boards via GPIO-Ports
  40. Need help running the PCIe to DDR3 SDRAM reference design
  41. Running Triple Speed Ethernet Design on Cyclone III Development Board
  42. Flash programming "Auto Detect" failure
  43. How to store data in de2 SDcard
  44. Need help running the PCIe to DD3 Reference design program in Windows7 or Vista
  45. Problems with the video decoder on the DE2- Board
  46. 88e1111 loopback
  47. Running PCIe to DDR3 Reference Design Demo in PCIe2.0
  48. Nios II Embedded Evaluation Kit Cyclone III Edition-el camino sd card error
  49. My projects don't run.
  50. Stratix3 Dev Kit, Using HSMC ports as I/O
  51. Win Vista: Bemicro hardware not found?
  52. VB communication with development board
  53. Problems uploading program into flash memory
  54. SD card driver using verilog
  55. Problems uploading flash memory -- part 2
  56. Linux 9.1beta Megawizard Memory Compiler broken
  57. Bemicro NIOS memory error
  58. What's the external SRAM for and where is the code?
  59. Issues with Stratix IV E FPGA Dev Kit
  60. Image transfer using DE2
  61. DE2 Echo Feature
  62. DE2-70 Read Flash without Nios2
  63. Cyclone III Starter Kit - DDR-SDRAM - help
  64. Cyclone III Development Kit ERROR LED
  65. I don't know which software to use
  66. HSMC interface IO in SOPC Builder
  67. Programming fail with MAXII-1270 dev kit
  68. Need sof file to run PCIe High Performance Reference Design
  69. Nios II Embedded Evaluation Kit, Cyclone III Edition
  70. Cyclone II EP2C35 kit, how to evaluate PCI?
  71. Help with video manipulation on DE2
  72. Frame Reader configuration
  73. problem with the data transmitted from ethernet
  74. Can I safely provide the DE2's GPIO pins with 5V?
  75. uboot on cyclone III(EP3C25) Nios development kit
  76. How much sampling rate in ADA demo?
  77. Terasic DE3 JTAG
  78. Dev Kit and Dell "Training Error"
  79. User LEDs 2 - 4 on NEEK, Cyclone III
  80. DDR SOPC PLL problem
  81. Ethernet UDP on DE2-70
  82. JTAG and Config, Mutil Voltage, Multi Chip
  83. help for using triple speed ethernet
  84. DE2 Flash RO File System
  85. DVI on Stratix II Audio Video Dev. Kit
  86. Stratix III DSP kit Quad Video HSMC
  87. Stratix III transcend DDR2 DIMM timing
  88. Default Startup for DE2 Board
  89. Flash Connection Problem
  90. Failed to configure Altera PCIE reference design on Stratix IV development board
  91. Help to find the ip address using media computer
  92. NEEK Cyc.III - TPG to Touch LCD flackert - bitte um Hilfe
  93. megaram function and DE2 board
  94. NEEK CIII SSRAM-Single Adress Read at MTDB_LCD_TV Demoproject
  95. How to get Data from a Verilogfile to the NIOS II Softcore
  96. HPC II in Stratix III DSP kit: mem_clk[0] is not accepted as Bidir
  97. MSEL pins
  98. hsmc dvi recognition by os
  99. DDR2 SDRAM termination
  100. Getting multiple fan-out errors when compiling a scratch Nios with DDR SDRAM support
  101. Arria II GX PCIe w/ Linux PCIe driver
  102. data to memory Nios II IDE
  103. How to Display Data on the LCD @ NEEK
  104. DDR phase offset Cyclone III Dev Kit
  105. nios 2 dosen't work on Stratix II GX PCIE development board
  106. Problem with TREX-S2 fromTerasic
  107. MyFirstFPGA on Stratix II PCI Express Dev Kit
  108. DE1 LINE OUT (headphone) socket
  109. VGA graphics Using MAXII CPLD done
  110. Speech Rrecognition In De1 Board
  111. Design files for the EP2C35 NIOS dev kit
  112. Problem in using PLL
  113. Problems with the pin assignment
  114. problem with enet on 3C120 dev board
  115. Two Master RAM Access
  116. TRDB-D5M with Cyclone 3 Development board
  117. Initialising SRAM
  118. Books for Designing FPGA in NEEK
  119. Using the development kit license for a network
  120. DM9000A & MAC-controller
  121. DCFIFO and AD9433 problem
  122. How to find HTML file
  123. JTAG ID error
  124. Problem to download from ALTERA SITE
  125. CycloneIII FPGA Starter kit DDR clock pins and main oscillator voltage
  126. Download the software image Problem
  127. Jungo 8.11 + 3 PLDA ARRIAGX Boards + DMA + IT
  128. Documentation for Stratix II Nios eval kit with "ES" device
  129. HELP == SRAM Buffer for video
  130. DE2 SRAM component in SOPC missing
  131. LCD with stratix 1s40
  132. DE2 Demonstration Project
  133. DE1 Board CII_Starter_USB_API demo does not work.
  134. Cyclone III FPGA Starter transer data
  135. Nios II Embedded Evaluation Kit
  136. VIP in DE2. Am I in the right way?
  137. Parallel Flash Loader on Stratix III & S3 DSP Dev Kit... Anyone have it working?
  138. EP3C120 + Nios2UDPOffloadExample
  139. How GPIO could connect with the ultrasonic sensor
  140. evaluation kit mac address wrong
  141. How to program an I/O as a open drain on MAXII Micro Kit by using Quartus II?
  142. Access SRAM in Cyclone III Starter Kit
  143. Bemicro NIOS lockup on EPCS access
  144. Nios II Embedded Evaluation Kit vga output problem
  145. Noise on DE2 Board (audio issue)
  146. What software I need to buy to work with Cyclon III dev. board?
  147. DE2 Board External RAM Read/Write Issue
  148. Want a daughter card with DC signals
  149. Cyclon III dev board timing problem
  150. Generating composite video with DE2s DAC
  151. Problems with tcl scripts
  152. What is wrong with "Error sending DHCP packet on iface 0".
  153. How to get the MAC address of DE2 dev?
  154. alternative to s2gx signal integrity kit
  155. Bitec HSMC digital video
  156. Interfacing Terasic THDB_ADA Daughter Card with Cyclone III Starter Kit
  157. Cyclone III Nios II LCD problem
  158. How DE2 communicate with PS/2
  159. Bitec
  160. DE1 USB Byte Blaster Software setup Problem
  161. DE0 board, mysterious LED behavior
  162. S3 dev kit - using the USB for general purpose I/O
  163. de2 as programing problem
  164. PFL settings for Stratix3 Dev Board
  165. Syntax error
  166. clock generator IC of cyclone III...
  167. NEEK recovering factory settings
  168. Cyclone Iii Hsmc Dvi
  169. using RAM memory on de1 board (Cyclone II)
  170. Problems with NEEK tutorial using Quartus 9.1sp2
  171. SDRAM problem
  172. "Fail to Connect your development board"-Cyclone III Starter Kit
  173. read data from SSRAM on cyclone III
  174. How to add html file under eCos
  175. Video Kit W/cyclone Ii Ep2c70n
  176. looking for details of dip-switch SW2 of Altera DSP board PE
  177. Ethernet MAC/PHY (LAN91C111) with Stratix II
  178. THDB_ADA daughter board
  179. Missing path information in .qip file with QUARTUS II 9.1
  180. eCos support for DE3 board
  181. Cyclone III FPGA Starter Kit - Clock
  182. MegaCore Function Generation Error. IP Functional Simulation Model Creation Failed.
  183. Looking for the cd-rom of Stratix PCI Development Board
  184. For Sale: Nios II Embedded Evaluation Kit (NEEK), Cyclone III Edition
  185. DK-MAXII-1270N Factory Image
  186. Running MIPS on Altera Board
  187. Boundary-Scan Testing in DE0/DE1
  188. How to connecte DE3 to a breadboard vis HSMC?
  189. Cyclone IV GX dev kit schematics and gerbers
  190. Frame reader initialization
  191. Power Supply for DK-NIOS-2S60N
  192. DE1 SDRAM in VHDL
  193. DVI daughter card hell.
  194. FPGA example to wirte data to SSRAM/SDRAM in Cyclone III starter kit?
  195. some problem about flash programmer
  196. SD Card on DE1 board
  197. GPIO - problem defining input and output pin on the same gpio connector...
  198. 3.3 V Output needed from Cyclone III Starter Kit
  199. HSMC Version 1.2
  200. DK-START-3C25N only work with HSMC connector?
  201. Permanent design
  202. SSRAM (IS61LPS25636A)) on Cyclone III starter board
  203. Slow frame rate (DE1 + D5M)
  204. Question on factory configure file for MaxII in C3 or S3 dev. kit
  205. where I can find the schematic file for DE3?
  206. CX4-to-HSMC Adapter on Arria-II GX
  207. HOW to convert serial RGB to parallel ?i am using the ip\LCD_Panel_TPO_TD043MTEA1
  208. CONF_DONE in Cyclone III DSP kit
  209. Unable to run lpm_inv
  210. Cyclone III Starter kit--DDR SDRAM address mapping (NIOS II)
  211. Trying to interface VGA with Custom CPU on DE2
  212. Configuring ByteBlaster and putting Kernal Mode driver to bed.
  213. SD IP core for DE1 don't work on quartus 9.1
  214. Questions about Altera Embedded Systems Development Kit, Cyclone III Edition
  215. 1Gb/s Ethernet board
  216. USB programmer
  217. Arria II GX, small example
  218. TSE with the dual SGDMA modules...
  219. Can't generate 20Mhz clock from Cyclone III Starter Kit
  220. read data from SSRAM (IS61LPS25636A)) on Cyclone III starter board
  221. simple socket server is simple, but still need help
  222. Stratix III + JTAG on HSMC port
  223. Help!!DSP Compute Board
  224. the usage of the resistances on DE2-70?
  225. termination of jtag signals
  226. Unable to Download Nios2 code
  227. Information about MAX II MICRO KIT
  228. looking for a development kit
  229. DE3 DDR2 demo does not work with Quartus v9.1
  230. CYCLONE III esdk KIT multimedia lcd factory demo
  231. SIV PCIe high performance ref design data can arrive out of order
  232. Pin assignments for DDR2 SDRAM tutorial
  233. ADCs on-board
  234. Cyclone IV SMA Loopback test
  235. Differential signaling Dev kit\board
  236. SIIGX Dev Kit GUI clock setting
  237. NEEK & Design Tutorial
  238. SimpleSocketServer (EP3C120 DB)
  239. Questions about SDRAM memory test on CyIII DK
  240. read image .bmp with niosII
  241. Timing violation TRDB_D5M_CD_v1.0 and DE_TV demos
  242. Code In De2_tv For Kit De2
  243. DE3 USB Data Transfer
  244. SSRAM Chip/Clock and Flash Clock on Cyclone III Starter Kit
  245. Solar panel to VGA
  246. Solar panel to VGA
  247. AN483, tse_ref_design, error in analaysis&synthesis after sopc system generation
  248. Looking for Linux PCIe driver for CycloneIV Starter Kit
  249. Viewing Design files from Example folder (Cyclone3 starter kit)
  250. Nios II Etherent Standard Design Example on 3C120 development kit