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Forum: IP Discussion

A place to discuss topics related to Intellectual Property and solutions

  1. Sticky Thread Sticky: IP Core Resource Center for TSE, SDI, SPI4.2, PCIE, SRIO and 10GbE

    Started by GuruDog, September 24th, 2009 06:53 PM
    2 Pages
    1 2
    using tse ip core
    • Replies: 16
    • Views: 84,418
    June 9th, 2015, 07:50 AM Go to last post
    • Replies: 1
    • Views: 62
    Yesterday, 06:06 PM Go to last post
  1. 8K SDI Signal Pattern Generator

    Started by Thomson1967, May 28th, 2016 11:03 AM
    • Replies: 0
    • Views: 54
    May 28th, 2016, 11:03 AM Go to last post
  2. Avalon- Wishbone Wrapper OpenCores CAN Protocoll Controller

    Started by STS, March 4th, 2013 02:34 AM
    avalon wrapper, can controller, qsys, wishbone
    • Replies: 6
    • Views: 34,516
    May 26th, 2016, 06:47 PM Go to last post
  3. Tutorial: Using the USB-Blaster as an SOPC/Qsys Avalon-MM master

    Started by dwh@ovro.caltech.edu, March 14th, 2012 09:55 AM
    11 Pages
    1 2 3 ... 11
    • Replies: 109
    • Views: 72,654
    May 25th, 2016, 11:50 PM Go to last post
  4. Video synchronism signals on DisplayPort

    Started by gabrigob, May 24th, 2016 11:45 PM
    adaptive sync, displayport
    • Replies: 0
    • Views: 61
    May 24th, 2016, 11:45 PM Go to last post
  5. Is Random Number Generator available for Max 10 FPGAs?

    Started by Ozu, May 24th, 2016 12:56 AM
    max 10, rng ip
    • Replies: 2
    • Views: 75
    May 24th, 2016, 10:06 PM Go to last post
    • Replies: 3
    • Views: 122
    May 24th, 2016, 09:04 AM Go to last post
    • Replies: 19
    • Views: 12,556
    May 19th, 2016, 06:36 PM Go to last post
  6. Question max burst size

    Started by draconis, March 3rd, 2016 08:46 AM
    • Replies: 3
    • Views: 337
    May 18th, 2016, 02:50 PM Go to last post
  7. Exclamation PB with Customer peripheral

    Started by hazemtn, May 18th, 2016 05:16 AM
    #niosii_beginner
    • Replies: 0
    • Views: 63
    May 18th, 2016, 05:16 AM Go to last post
    • Replies: 0
    • Views: 66
    May 18th, 2016, 01:21 AM Go to last post
  8. Bug in Altera LDPC Encoder, problem with flow control

    Started by rcasepl, May 17th, 2016 06:20 AM
    bug, ldpc
    • Replies: 0
    • Views: 75
    May 17th, 2016, 06:20 AM Go to last post
  9. ethernet ip

    Started by resmicgpnair, May 4th, 2016 08:46 PM
    • Replies: 3
    • Views: 177
    May 16th, 2016, 09:05 PM Go to last post
  10. JESD204B device clk

    Started by ipruzhinin, November 8th, 2015 09:55 PM
    • Replies: 8
    • Views: 1,808
    May 16th, 2016, 04:43 PM Go to last post
  11. 8E1111 PHY tx_clk and rx_clk

    Started by vinaymanik, May 12th, 2016 03:25 PM
    8e1111
    • Replies: 5
    • Views: 159
    May 13th, 2016, 10:45 AM Go to last post
    • Replies: 3
    • Views: 137
    May 13th, 2016, 06:53 AM Go to last post
  12. Using UART at arbitrary BAUD Rate

    Started by Pdonegan, May 5th, 2016 07:54 AM
    qsys, uart
    • Replies: 3
    • Views: 190
    May 13th, 2016, 12:21 AM Go to last post
  13. SRIO IP core with loop simulation

    Started by cryshuan, May 10th, 2016 11:42 PM
    • Replies: 0
    • Views: 33
    May 10th, 2016, 11:42 PM Go to last post
  14. Avalon ST custom IP component

    Started by Korn, March 3rd, 2016 07:23 AM
    2 Pages
    1 2
    • Replies: 14
    • Views: 847
    May 10th, 2016, 12:00 PM Go to last post
  15. Qsys:Peripherals:Frequency_counter

    Started by donq, May 6th, 2016 10:03 AM
    frequency_counter
    • Replies: 0
    • Views: 119
    May 6th, 2016, 10:03 AM Go to last post
    • Replies: 8
    • Views: 336
    May 5th, 2016, 10:14 PM Go to last post
    • Replies: 0
    • Views: 126
    May 5th, 2016, 04:31 AM Go to last post
  16. DisplayPort Bitec core

    Started by Lancer, February 24th, 2016 11:27 PM
    • Replies: 1
    • Views: 284
    May 4th, 2016, 02:41 PM Go to last post
  17. Library auk_dspip_lib not found

    Started by Vector Huang, May 2nd, 2016 04:36 AM
    • Replies: 0
    • Views: 112
    May 2nd, 2016, 04:36 AM Go to last post
  18. PCIe IO BAR's limited to "Legacy Endpoints"

    Started by bob_dixon, April 29th, 2016 11:39 AM
    bar, iospace, pcie, stratix
    • Replies: 3
    • Views: 202
    May 1st, 2016, 03:54 PM Go to last post
  19. fft megacore core giving all HI-Z to all output signals

    Started by vhdlhog, April 25th, 2016 07:45 PM
    • Replies: 0
    • Views: 96
    April 25th, 2016, 07:45 PM Go to last post
  20. Configuration via Protocol - load core from QSPI

    Started by simonkbrown, April 25th, 2016 04:45 AM
    • Replies: 0
    • Views: 94
    April 25th, 2016, 04:45 AM Go to last post
  21. altsyncram simulating, data changes on failing edge

    Started by Juzujka, April 22nd, 2016 04:30 AM
    • Replies: 2
    • Views: 190
    April 25th, 2016, 02:58 AM Go to last post
  22. half precision floating point in Aria 10

    Started by ggeorgak, April 24th, 2016 06:17 AM
    aria 10, floating point, half precision, quartus
    • Replies: 0
    • Views: 122
    April 24th, 2016, 06:17 AM Go to last post
    • Replies: 0
    • Views: 145
    April 22nd, 2016, 12:44 PM Go to last post

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