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Forum: General Altera Discussion

A place to discuss topics on general Altera products, applications and development

  1. Angry Very Disappointed with DE0-Nano

    Started by Givi, December 29th, 2016 04:22 PM
    2 Pages
    1 2
    • Replies: 19
    • Views: 583
    Yesterday, 06:11 PM Go to last post
  2. Programmer fails at 87% - SoCKit

    Started by matlabfft, November 13th, 2014 07:09 AM
    • Replies: 4
    • Views: 9,108
    Yesterday, 02:03 PM Go to last post
  3. Video Processing and compression

    Started by sivaramanr, January 16th, 2017 10:29 PM
    • Replies: 1
    • Views: 54
    January 16th, 2017, 11:17 PM Go to last post
  4. how to automatically program using the usb blaster?

    Started by pascal.schwartz, December 28th, 2011 10:06 PM
    • Replies: 6
    • Views: 34,012
    January 15th, 2017, 11:53 PM Go to last post
  5. Question De0 Nano SoC Ethernet

    Started by BrakJR, January 15th, 2017 04:16 PM
    • Replies: 0
    • Views: 57
    January 15th, 2017, 04:16 PM Go to last post
  6. Unhappy Digital signal processing capabilities of DE2-115

    Started by Propaste, December 28th, 2016 10:35 AM
    audio processing, de2-115, dsp, final year project, fpga
    • Replies: 5
    • Views: 207
    January 14th, 2017, 02:20 PM Go to last post
    • Replies: 3
    • Views: 90
    January 14th, 2017, 05:06 AM Go to last post
  7. Angry Post-Fit Partition Export

    Started by msj, January 14th, 2017 03:06 AM
    design partition, gigabit ethernet, gigabit phy, logic lock region, rgmii mac
    • Replies: 0
    • Views: 45
    January 14th, 2017, 03:06 AM Go to last post
  8. Quartus workflow

    Started by vlrean, January 10th, 2017 12:49 AM
    2 Pages
    1 2
    • Replies: 17
    • Views: 371
    January 13th, 2017, 10:32 AM Go to last post
  9. ALTLVDS_RX->LVDS serdes Link Training

    Started by ash80, December 28th, 2016 03:17 AM
    2 Pages
    1 2
    • Replies: 14
    • Views: 394
    January 13th, 2017, 07:29 AM Go to last post
  10. Exclamation Maximum Performance of DDR2 ALTMEMPHY on Cyclone-III

    Started by msj, December 15th, 2016 07:40 AM
    altmemphy, cyclone iii, ddr2, timing
    • Replies: 3
    • Views: 207
    January 13th, 2017, 03:36 AM Go to last post
  11. Question Function of Pin L2 in Max10 U169 package (10M16SAU169)?

    Started by Algorith, January 10th, 2017 11:25 AM
    max10, pin function, pin l2, pin planner, u169
    • Replies: 4
    • Views: 129
    January 12th, 2017, 09:29 AM Go to last post
  12. MAX 10 True LVDS Tx where are you??

    Started by Eric_8'h43, January 11th, 2017 02:51 PM
    max 10, max10, true lvds tx
    • Replies: 3
    • Views: 105
    January 12th, 2017, 03:19 AM Go to last post
    • Replies: 2
    • Views: 104
    January 11th, 2017, 04:27 PM Go to last post
  13. help for audio codec using VHDL

    Started by bhatta422, November 10th, 2010 10:42 AM
    8 Pages
    1 2 3 ... 8
    • Replies: 71
    • Views: 107,039
    January 11th, 2017, 03:19 AM Go to last post
  14. Bootloader With 4-Byte Address Mode Support

    Started by Neil_L, January 10th, 2017 12:06 PM
    • Replies: 0
    • Views: 57
    January 10th, 2017, 12:06 PM Go to last post
  15. Some problems about altera_pll on cyclone V device

    Started by darlingsun, August 8th, 2016 07:38 AM
    cyclone v, pll
    • Replies: 9
    • Views: 714
    January 10th, 2017, 10:07 AM Go to last post
  16. Can't register or login myAltera account

    Started by Yaltsev, January 10th, 2017 07:28 AM
    • Replies: 0
    • Views: 238
    January 10th, 2017, 07:28 AM Go to last post
  17. tcl commands in Altera Modelsim

    Started by j_reinauld, May 7th, 2010 06:27 AM
    2 Pages
    1 2
    • Replies: 13
    • Views: 37,366
    January 9th, 2017, 09:11 PM Go to last post
  18. Internal Ground in Quartus on DE2-115 board

    Started by Dawud Beale, January 8th, 2017 11:15 AM
    • Replies: 1
    • Views: 79
    January 9th, 2017, 01:02 AM Go to last post
    • Replies: 0
    • Views: 89
    January 6th, 2017, 01:30 AM Go to last post
  19. Strange EPM7032S during Silicon ID check

    Started by nckm, December 6th, 2011 11:56 AM
    • Replies: 1
    • Views: 28,521
    January 5th, 2017, 10:16 PM Go to last post
  20. Question PLL cascading on Cyclone V - broken?

    Started by foft, November 19th, 2016 01:58 PM
    adjpllin, cascade_out, cascading, cyclonev, pll
    • Replies: 2
    • Views: 246
    January 5th, 2017, 01:27 PM Go to last post
  21. how to simulate qdr of bitware ?

    Started by crazybuddy1164, January 5th, 2017 04:03 AM
    bitware, modelsim, quartus
    • Replies: 0
    • Views: 76
    January 5th, 2017, 04:03 AM Go to last post
  22. Windows 10 IOT

    Started by LUKEMON, January 5th, 2017 03:08 AM
    • Replies: 0
    • Views: 73
    January 5th, 2017, 03:08 AM Go to last post
  23. Using SublimeText with Quartus

    Started by JacobJ, January 5th, 2017 02:07 AM
    sublimetext
    • Replies: 0
    • Views: 76
    January 5th, 2017, 02:07 AM Go to last post
  24. Multisim wave window does not show

    Started by JacobJ, December 20th, 2016 01:51 AM
    multisim
    • Replies: 4
    • Views: 231
    January 5th, 2017, 02:04 AM Go to last post
  25. configure jtag server with user privileges

    Started by rtiadmin, December 19th, 2016 09:28 AM
    • Replies: 3
    • Views: 175
    January 3rd, 2017, 01:40 AM Go to last post
  26. connection problem with qdr..how to write data on qdr.?

    Started by crazybuddy, January 2nd, 2017 03:18 AM
    qdr, qsys, quartus, vhdl, vlsi
    • Replies: 0
    • Views: 95
    January 2nd, 2017, 03:18 AM Go to last post
    • Replies: 6
    • Views: 195
    January 2nd, 2017, 03:04 AM Go to last post

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