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Forum: General Altera Discussion

A place to discuss topics on general Altera products, applications and development

  1. Avalon MM/ST/SGDMA Byte ordering

    Started by ZubairLK, April 8th, 2013 05:12 AM
    avalon, sgdma
    • Replies: 4
    • Views: 35,863
    April 10th, 2013, 03:05 PM Go to last post
  2. Qsys Keep generating Verilog files when I want VHDL

    Started by GE_Bill, April 10th, 2013 11:50 AM
    • Replies: 1
    • Views: 30,736
    April 10th, 2013, 12:38 PM Go to last post
  3. Add module to the DE0 nano basic computer

    Started by joselito23, April 10th, 2013 10:59 AM
    • Replies: 0
    • Views: 30,077
    April 10th, 2013, 10:59 AM Go to last post
    • Replies: 0
    • Views: 30,213
    April 10th, 2013, 10:20 AM Go to last post
    • Replies: 1
    • Views: 31,728
    April 10th, 2013, 08:43 AM Go to last post
  4. Post Run LCD Nios Program Automatically

    Started by somosuyi, April 10th, 2013 08:36 AM
    fpga, lcd display
    • Replies: 0
    • Views: 32,201
    April 10th, 2013, 08:36 AM Go to last post
  5. System ID and Time Stamp Not Found

    Started by migara8, April 8th, 2013 12:00 PM
    • Replies: 5
    • Views: 34,332
    April 10th, 2013, 07:50 AM Go to last post
  6. Question DE2 board and Qsys

    Started by alteratech, April 5th, 2013 10:14 AM
    2 Pages
    1 2
    de2 board, from altera, qsys tutorials
    • Replies: 10
    • Views: 36,861
    April 9th, 2013, 07:46 AM Go to last post
  7. an374 "Video over IP" reference design

    Started by zayneb, April 8th, 2013 10:27 AM
    • Replies: 0
    • Views: 31,447
    April 8th, 2013, 10:27 AM Go to last post
  8. Fast Input Register Logic Option

    Started by ali_umair21, April 3rd, 2013 08:27 AM
    • Replies: 8
    • Views: 35,997
    April 8th, 2013, 10:23 AM Go to last post
  9. Unable to Scan device chain. Can't scan JTAG chain

    Started by arunapai, April 8th, 2013 05:21 AM
    • Replies: 1
    • Views: 35,424
    April 8th, 2013, 08:05 AM Go to last post
  10. altfp_add_sub

    Started by tassou, April 5th, 2013 04:12 AM
    • Replies: 4
    • Views: 33,352
    April 8th, 2013, 05:11 AM Go to last post
  11. downloding web server labraries

    Started by mira, April 6th, 2013 03:08 AM
    • Replies: 2
    • Views: 31,723
    April 8th, 2013, 04:57 AM Go to last post
  12. Eyelytics h.264 encoder

    Started by sinam, April 8th, 2013 04:38 AM
    • Replies: 0
    • Views: 32,352
    April 8th, 2013, 04:38 AM Go to last post
  13. Time constraint and IP core

    Started by bacbac, April 7th, 2013 11:20 AM
    ip core, megafunction, time constraint, timequest
    • Replies: 3
    • Views: 33,418
    April 7th, 2013, 11:49 PM Go to last post
  14. register's initial value during reset state

    Started by iozana, April 6th, 2013 09:49 PM
    2 Pages
    1 2
    • Replies: 14
    • Views: 37,285
    April 7th, 2013, 05:04 PM Go to last post
    • Replies: 2
    • Views: 32,382
    April 7th, 2013, 10:25 AM Go to last post
  15. Over heating of ARRIA V

    Started by yafpga, April 7th, 2013 05:38 AM
    • Replies: 1
    • Views: 31,354
    April 7th, 2013, 06:09 AM Go to last post
    • Replies: 2
    • Views: 34,510
    April 7th, 2013, 05:48 AM Go to last post
  16. avalon master SOPC Builder

    Started by zayneb, April 2nd, 2013 06:18 AM
    • Replies: 3
    • Views: 31,922
    April 6th, 2013, 01:45 PM Go to last post
  17. how to generate an PCIE interrupt

    Started by santhoshrkumar@yahoo.com, April 6th, 2013 02:23 AM
    • Replies: 0
    • Views: 32,442
    April 6th, 2013, 02:23 AM Go to last post
  18. an374

    Started by zayneb, April 6th, 2013 12:02 AM
    • Replies: 0
    • Views: 32,178
    April 6th, 2013, 12:02 AM Go to last post
  19. Qsys generates. but analysis/synthesis error

    Started by ZubairLK, April 5th, 2013 10:01 AM
    qsys
    • Replies: 0
    • Views: 32,552
    April 5th, 2013, 10:01 AM Go to last post
  20. Concept of CRC24 calcualtion for 64 bits

    Started by vinoth, April 4th, 2013 12:46 AM
    • Replies: 4
    • Views: 32,422
    April 5th, 2013, 08:57 AM Go to last post
  21. Lightbulb for module 'cpu' did NOT run successfully.

    Started by zayneb, April 4th, 2013 04:00 AM
    • Replies: 9
    • Views: 33,316
    April 5th, 2013, 08:41 AM Go to last post
  22. Does an FPGA need an external clock source?

    Started by vphaniendra, April 4th, 2013 08:52 PM
    • Replies: 1
    • Views: 33,260
    April 4th, 2013, 09:24 PM Go to last post
  23. PHY Ethernet to optics without external chip

    Started by K91Mike, March 25th, 2013 06:31 AM
    • Replies: 6
    • Views: 35,669
    April 4th, 2013, 06:02 AM Go to last post
  24. Nest if statement in case statement

    Started by deded84, April 3rd, 2013 10:34 PM
    • Replies: 5
    • Views: 34,642
    April 4th, 2013, 03:35 AM Go to last post
  25. altlvds_rx data ordering

    Started by galign, April 4th, 2013 12:27 AM
    • Replies: 0
    • Views: 32,890
    April 4th, 2013, 12:27 AM Go to last post
  26. usage of JTAG-UART without NIOS CPU and avalon interfaces

    Started by dejfson, April 4th, 2013 12:19 AM
    avalon, jtag-uart
    • Replies: 0
    • Views: 32,498
    April 4th, 2013, 12:19 AM Go to last post

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