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Forum: General Altera Discussion

A place to discuss topics on general Altera products, applications and development

  1. Interfacing landline telephone with De1

    Started by madduanil, September 30th, 2012 10:00 AM
    • Replies: 0
    • Views: 29,707
    September 30th, 2012, 10:00 AM Go to last post
  2. Improving I/O timing

    Started by gmuldrow, September 28th, 2012 05:13 AM
    • Replies: 2
    • Views: 57,153
    September 29th, 2012, 07:03 AM Go to last post
  3. convert vhdl to verilog

    Started by rooneyyoong, September 28th, 2012 11:34 PM
    • Replies: 0
    • Views: 31,258
    September 28th, 2012, 11:34 PM Go to last post
  4. Unhappy Simulate Error in Modelsim

    Started by notooth, April 5th, 2011 08:21 PM
    • Replies: 2
    • Views: 40,306
    September 28th, 2012, 07:56 PM Go to last post
  5. Question DEII GPIO Bidirectional problem

    Started by gpakillsme, September 27th, 2012 10:41 PM
    • Replies: 2
    • Views: 32,238
    September 28th, 2012, 05:49 PM Go to last post
  6. FPGA pin assignments - is it good to breakup the buses

    Started by tapas2day, September 25th, 2012 03:17 PM
    • Replies: 3
    • Views: 32,896
    September 28th, 2012, 10:28 AM Go to last post
  7. multiplexed display system

    Started by aya2002, September 27th, 2012 02:23 PM
    • Replies: 8
    • Views: 32,328
    September 28th, 2012, 02:38 AM Go to last post
  8. Creating HDL Design File from tdf Files for use in ModelSim

    Started by spflanze, September 27th, 2012 11:06 AM
    • Replies: 3
    • Views: 34,205
    September 27th, 2012, 11:46 PM Go to last post
  9. Synchronizing two different clocks

    Started by amatu_g, September 27th, 2012 02:54 AM
    • Replies: 3
    • Views: 30,523
    September 27th, 2012, 06:41 AM Go to last post
  10. How to write Transfer function using QUARTUS II

    Started by kingsuk, September 18th, 2012 03:07 AM
    • Replies: 3
    • Views: 34,242
    September 27th, 2012, 04:19 AM Go to last post
  11. AES core?

    Started by smsmsda, September 26th, 2012 08:02 PM
    • Replies: 1
    • Views: 30,784
    September 27th, 2012, 03:31 AM Go to last post
    • Replies: 4
    • Views: 32,188
    September 27th, 2012, 02:28 AM Go to last post
  12. Extracting cache hits/misses

    Started by chnaideur, September 24th, 2012 04:55 PM
    • Replies: 2
    • Views: 28,694
    September 26th, 2012, 10:40 PM Go to last post
  13. Question Initial process does not run?

    Started by notooth, September 23rd, 2012 02:58 AM
    2 Pages
    1 2
    • Replies: 10
    • Views: 29,390
    September 26th, 2012, 07:47 AM Go to last post
  14. Cyclon 3 PCB standart Configuration

    Started by ilik, September 24th, 2012 05:49 AM
    • Replies: 5
    • Views: 31,188
    September 26th, 2012, 07:31 AM Go to last post
  15. PLL: Clock switchover (Cyclone III)

    Started by cbanos, September 26th, 2012 07:28 AM
    • Replies: 0
    • Views: 31,696
    September 26th, 2012, 07:28 AM Go to last post
  16. Number of gates ?

    Started by smsmsda, September 24th, 2012 11:40 PM
    2 Pages
    1 2
    • Replies: 13
    • Views: 32,945
    September 26th, 2012, 12:33 AM Go to last post
  17. reading and writing to ddr2

    Started by jbouie, September 25th, 2012 10:52 PM
    • Replies: 2
    • Views: 31,560
    September 25th, 2012, 11:54 PM Go to last post
  18. Upgrade Altera Cyclone II fpga device

    Started by alex_rs6, September 24th, 2012 06:25 AM
    • Replies: 8
    • Views: 33,917
    September 25th, 2012, 11:44 PM Go to last post
  19. values are not stored in the register yet counter is ok

    Started by lyonene_jd, September 25th, 2012 09:11 PM
    • Replies: 0
    • Views: 32,165
    September 25th, 2012, 09:11 PM Go to last post
  20. nand flash

    Started by ajay_106, September 23rd, 2012 08:22 AM
    • Replies: 4
    • Views: 34,554
    September 25th, 2012, 08:27 AM Go to last post
  21. What I need to start with Ethernet Project ?

    Started by thalsharif, September 22nd, 2012 02:01 PM
    • Replies: 3
    • Views: 33,173
    September 24th, 2012, 11:20 PM Go to last post
  22. Question bsf file not gerated in qsys

    Started by chema15, July 3rd, 2012 02:26 PM
    • Replies: 2
    • Views: 33,454
    September 24th, 2012, 07:52 AM Go to last post
  23. Vip_wrapper_for_c_func

    Started by yangloong, September 24th, 2012 06:05 AM
    • Replies: 0
    • Views: 29,616
    September 24th, 2012, 06:05 AM Go to last post
  24. a very nooby question

    Started by ilik, September 20th, 2012 02:48 AM
    • Replies: 4
    • Views: 30,387
    September 24th, 2012, 04:58 AM Go to last post
  25. Cyclone III -- IO port in VHDL help

    Started by ktn, September 21st, 2012 05:41 AM
    • Replies: 5
    • Views: 33,124
    September 24th, 2012, 04:26 AM Go to last post
  26. Smile Time needed for clocked process

    Started by notooth, September 23rd, 2012 03:48 PM
    • Replies: 3
    • Views: 33,454
    September 24th, 2012, 03:26 AM Go to last post
  27. State Machine Viewer State Machine Missing

    Started by KnightRider123, September 24th, 2012 12:49 AM
    • Replies: 0
    • Views: 33,634
    September 24th, 2012, 12:49 AM Go to last post
  28. UART Transmitter Sends Bytes Out of Order

    Started by kbarber, August 30th, 2012 09:40 AM
    • Replies: 9
    • Views: 35,971
    September 24th, 2012, 12:35 AM Go to last post
  29. multiple constant drivers

    Started by lyonene_jd, September 23rd, 2012 06:37 AM
    • Replies: 3
    • Views: 29,849
    September 24th, 2012, 12:32 AM Go to last post

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