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Forum: General Altera Discussion

A place to discuss topics on general Altera products, applications and development

  1. up/down counter

    Started by malvin, January 23rd, 2017 01:52 AM
    • Replies: 9
    • Views: 840
    January 27th, 2017, 03:49 PM Go to last post
  2. Any recommendations for a fast hashing algorithm?

    Started by jsag, January 26th, 2017 01:31 PM
    • Replies: 0
    • Views: 385
    January 26th, 2017, 01:31 PM Go to last post
  3. configure jtag server with user privileges

    Started by rtiadmin, December 19th, 2016 08:28 AM
    • Replies: 4
    • Views: 679
    January 26th, 2017, 06:24 AM Go to last post
  4. 0-15 counter

    Started by malvin, January 24th, 2017 10:57 AM
    2 Pages
    1 2
    • Replies: 11
    • Views: 1,032
    January 25th, 2017, 06:40 PM Go to last post
  5. DMA file transfer

    Started by SharpWeapon, January 25th, 2017 12:59 AM
    dma. nios, file transfer, qsys, sdram
    • Replies: 0
    • Views: 412
    January 25th, 2017, 12:59 AM Go to last post
  6. avalon_master vs avalon_pipe_master

    Started by tw011, January 24th, 2017 08:12 PM
    • Replies: 1
    • Views: 425
    January 24th, 2017, 09:03 PM Go to last post
  7. Quartus simulation fail

    Started by SharpWeapon, January 24th, 2017 08:22 PM
    fail, nativelink, quartus 16.1, simulation
    • Replies: 0
    • Views: 627
    January 24th, 2017, 08:22 PM Go to last post
  8. PCI Express on Cyclone V GT FPGA Development Kit

    Started by Alexxxey, January 24th, 2017 11:16 AM
    cyclone v, cyclone v gt, pci express, pci-e, pcie
    • Replies: 0
    • Views: 523
    January 24th, 2017, 11:16 AM Go to last post
  9. DE4 pin assignmnet .csv file

    Started by SharpWeapon, January 23rd, 2017 07:34 PM
    • Replies: 2
    • Views: 514
    January 23rd, 2017, 08:28 PM Go to last post
  10. Can't find lpm_bustri in IP Catalog

    Started by STod, January 23rd, 2017 02:41 AM
    • Replies: 0
    • Views: 409
    January 23rd, 2017, 02:41 AM Go to last post
  11. MAX 10 Jtag Problem

    Started by punno2015, March 24th, 2016 04:15 AM
    • Replies: 7
    • Views: 1,868
    January 23rd, 2017, 02:03 AM Go to last post
    • Replies: 3
    • Views: 607
    January 22nd, 2017, 09:41 PM Go to last post
  12. Question Please tell me, about Quartus Prime Ver UP.

    Started by bbxerion, January 19th, 2017 03:38 PM
    • Replies: 3
    • Views: 695
    January 22nd, 2017, 02:49 PM Go to last post
  13. Angry Post-Fit Partition Export

    Started by msj, January 14th, 2017 02:06 AM
    design partition, gigabit ethernet, gigabit phy, logic lock region, rgmii mac
    • Replies: 1
    • Views: 494
    January 21st, 2017, 11:39 PM Go to last post
    • Replies: 3
    • Views: 658
    January 21st, 2017, 01:52 PM Go to last post
  14. Quartus workflow

    Started by vlrean, January 9th, 2017 11:49 PM
    2 Pages
    1 2
    • Replies: 18
    • Views: 1,559
    January 19th, 2017, 02:24 AM Go to last post
    • Replies: 0
    • Views: 378
    January 19th, 2017, 01:05 AM Go to last post
  15. Angry Very Disappointed with DE0-Nano

    Started by Givi, December 29th, 2016 03:22 PM
    2 Pages
    1 2
    • Replies: 19
    • Views: 1,897
    January 17th, 2017, 05:11 PM Go to last post
  16. Video Processing and compression

    Started by sivaramanr, January 16th, 2017 09:29 PM
    • Replies: 1
    • Views: 431
    January 16th, 2017, 10:17 PM Go to last post
  17. how to automatically program using the usb blaster?

    Started by pascal.schwartz, December 28th, 2011 09:06 PM
    • Replies: 6
    • Views: 35,194
    January 15th, 2017, 10:53 PM Go to last post
  18. Unhappy Digital signal processing capabilities of DE2-115

    Started by Propaste, December 28th, 2016 09:35 AM
    audio processing, de2-115, dsp, final year project, fpga
    • Replies: 5
    • Views: 916
    January 14th, 2017, 01:20 PM Go to last post
    • Replies: 3
    • Views: 570
    January 14th, 2017, 04:06 AM Go to last post
  19. Exclamation Maximum Performance of DDR2 ALTMEMPHY on Cyclone-III

    Started by msj, December 15th, 2016 06:40 AM
    altmemphy, cyclone iii, ddr2, timing
    • Replies: 3
    • Views: 759
    January 13th, 2017, 02:36 AM Go to last post
  20. Question Function of Pin L2 in Max10 U169 package (10M16SAU169)?

    Started by Algorith, January 10th, 2017 10:25 AM
    max10, pin function, pin l2, pin planner, u169
    • Replies: 4
    • Views: 648
    January 12th, 2017, 08:29 AM Go to last post
  21. MAX 10 True LVDS Tx where are you??

    Started by Eric_8'h43, January 11th, 2017 01:51 PM
    max 10, max10, true lvds tx
    • Replies: 3
    • Views: 616
    January 12th, 2017, 02:19 AM Go to last post
    • Replies: 2
    • Views: 558
    January 11th, 2017, 03:27 PM Go to last post
  22. help for audio codec using VHDL

    Started by bhatta422, November 10th, 2010 09:42 AM
    8 Pages
    1 2 3 ... 8
    • Replies: 71
    • Views: 112,612
    January 11th, 2017, 02:19 AM Go to last post
  23. Bootloader With 4-Byte Address Mode Support

    Started by Neil_L, January 10th, 2017 11:06 AM
    • Replies: 0
    • Views: 359
    January 10th, 2017, 11:06 AM Go to last post
  24. Some problems about altera_pll on cyclone V device

    Started by darlingsun, August 8th, 2016 06:38 AM
    cyclone v, pll
    • Replies: 9
    • Views: 1,415
    January 10th, 2017, 09:07 AM Go to last post
  25. Can't register or login myAltera account

    Started by Yaltsev, January 10th, 2017 06:28 AM
    • Replies: 0
    • Views: 708
    January 10th, 2017, 06:28 AM Go to last post

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