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Forum: General Altera Discussion

A place to discuss topics on general Altera products, applications and development

  1. DE4 pin assignmnet .csv file

    Started by SharpWeapon, Yesterday 08:34 PM
    • Replies: 2
    • Views: 38
    Yesterday, 09:28 PM Go to last post
  2. up/down counter

    Started by malvin, Yesterday 02:52 AM
    • Replies: 6
    • Views: 123
    Yesterday, 08:20 PM Go to last post
  3. ALTLVDS_RX->LVDS serdes Link Training

    Started by ash80, December 28th, 2016 03:17 AM
    2 Pages
    1 2
    • Replies: 17
    • Views: 532
    Yesterday, 06:26 AM Go to last post
  4. Can't find lpm_bustri in IP Catalog

    Started by STod, Yesterday 03:41 AM
    • Replies: 0
    • Views: 42
    Yesterday, 03:41 AM Go to last post
  5. MAX 10 Jtag Problem

    Started by punno2015, March 24th, 2016 05:15 AM
    • Replies: 7
    • Views: 1,076
    Yesterday, 03:03 AM Go to last post
    • Replies: 3
    • Views: 94
    January 22nd, 2017, 10:41 PM Go to last post
  6. Question Please tell me, about Quartus Prime Ver UP.

    Started by bbxerion, January 19th, 2017 04:38 PM
    • Replies: 3
    • Views: 97
    January 22nd, 2017, 03:49 PM Go to last post
  7. SDI over IP

    Started by msj, January 22nd, 2017 01:18 PM
    • Replies: 0
    • Views: 39
    January 22nd, 2017, 01:18 PM Go to last post
  8. Angry Post-Fit Partition Export

    Started by msj, January 14th, 2017 03:06 AM
    design partition, gigabit ethernet, gigabit phy, logic lock region, rgmii mac
    • Replies: 1
    • Views: 96
    January 22nd, 2017, 12:39 AM Go to last post
    • Replies: 3
    • Views: 99
    January 21st, 2017, 02:52 PM Go to last post
  9. "Can't lunch ModelSim-altera simulation software"

    Started by bhowmik05, January 19th, 2017 05:36 PM
    • Replies: 2
    • Views: 86
    January 20th, 2017, 04:34 PM Go to last post
  10. Quartus workflow

    Started by vlrean, January 10th, 2017 12:49 AM
    2 Pages
    1 2
    • Replies: 18
    • Views: 489
    January 19th, 2017, 03:24 AM Go to last post
    • Replies: 0
    • Views: 59
    January 19th, 2017, 02:05 AM Go to last post
  11. Angry Very Disappointed with DE0-Nano

    Started by Givi, December 29th, 2016 04:22 PM
    2 Pages
    1 2
    • Replies: 19
    • Views: 723
    January 17th, 2017, 06:11 PM Go to last post
  12. Programmer fails at 87% - SoCKit

    Started by matlabfft, November 13th, 2014 07:09 AM
    • Replies: 4
    • Views: 9,140
    January 17th, 2017, 02:03 PM Go to last post
  13. Video Processing and compression

    Started by sivaramanr, January 16th, 2017 10:29 PM
    • Replies: 1
    • Views: 90
    January 16th, 2017, 11:17 PM Go to last post
  14. how to automatically program using the usb blaster?

    Started by pascal.schwartz, December 28th, 2011 10:06 PM
    • Replies: 6
    • Views: 34,040
    January 15th, 2017, 11:53 PM Go to last post
  15. Question De0 Nano SoC Ethernet

    Started by BrakJR, January 15th, 2017 04:16 PM
    • Replies: 0
    • Views: 74
    January 15th, 2017, 04:16 PM Go to last post
  16. Unhappy Digital signal processing capabilities of DE2-115

    Started by Propaste, December 28th, 2016 10:35 AM
    audio processing, de2-115, dsp, final year project, fpga
    • Replies: 5
    • Views: 247
    January 14th, 2017, 02:20 PM Go to last post
    • Replies: 3
    • Views: 124
    January 14th, 2017, 05:06 AM Go to last post
  17. Exclamation Maximum Performance of DDR2 ALTMEMPHY on Cyclone-III

    Started by msj, December 15th, 2016 07:40 AM
    altmemphy, cyclone iii, ddr2, timing
    • Replies: 3
    • Views: 232
    January 13th, 2017, 03:36 AM Go to last post
  18. Question Function of Pin L2 in Max10 U169 package (10M16SAU169)?

    Started by Algorith, January 10th, 2017 11:25 AM
    max10, pin function, pin l2, pin planner, u169
    • Replies: 4
    • Views: 153
    January 12th, 2017, 09:29 AM Go to last post
  19. MAX 10 True LVDS Tx where are you??

    Started by Eric_8'h43, January 11th, 2017 02:51 PM
    max 10, max10, true lvds tx
    • Replies: 3
    • Views: 126
    January 12th, 2017, 03:19 AM Go to last post
    • Replies: 2
    • Views: 124
    January 11th, 2017, 04:27 PM Go to last post
  20. help for audio codec using VHDL

    Started by bhatta422, November 10th, 2010 10:42 AM
    8 Pages
    1 2 3 ... 8
    • Replies: 71
    • Views: 107,304
    January 11th, 2017, 03:19 AM Go to last post
  21. Bootloader With 4-Byte Address Mode Support

    Started by Neil_L, January 10th, 2017 12:06 PM
    • Replies: 0
    • Views: 68
    January 10th, 2017, 12:06 PM Go to last post
  22. Some problems about altera_pll on cyclone V device

    Started by darlingsun, August 8th, 2016 07:38 AM
    cyclone v, pll
    • Replies: 9
    • Views: 759
    January 10th, 2017, 10:07 AM Go to last post
  23. Can't register or login myAltera account

    Started by Yaltsev, January 10th, 2017 07:28 AM
    • Replies: 0
    • Views: 336
    January 10th, 2017, 07:28 AM Go to last post
  24. tcl commands in Altera Modelsim

    Started by j_reinauld, May 7th, 2010 06:27 AM
    2 Pages
    1 2
    • Replies: 13
    • Views: 37,435
    January 9th, 2017, 09:11 PM Go to last post
  25. Internal Ground in Quartus on DE2-115 board

    Started by Dawud Beale, January 8th, 2017 11:15 AM
    • Replies: 1
    • Views: 95
    January 9th, 2017, 01:02 AM Go to last post

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