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Forum: FPGA, Hardcopy, and CPLD Discussion

A place to discuss topics related to Altera's FPGA, CPLD, Hardcopy, and transceiver products (e.g. MAX, Stratix , Cyclone , GX, Hardcopy)

  1. Cyclone II PLL clock multiplier

    Started by znac049, Today 02:46 AM
    • Replies: 1
    • Views: 35
    Today, 03:20 AM Go to last post
  2. Altera On-Chip Flash IP Core

    Started by john7, May 15th, 2017 10:03 PM
    • Replies: 2
    • Views: 189
    Today, 12:04 AM Go to last post
  3. communication using rs232 to pc

    Started by dipin555, May 5th, 2017 03:35 AM
    • Replies: 1
    • Views: 283
    Yesterday, 06:52 AM Go to last post
  4. Help with setting up Cyclone V GT dev kit

    Started by matthewyih, May 16th, 2017 05:29 PM
    • Replies: 1
    • Views: 146
    May 19th, 2017, 10:59 AM Go to last post
  5. On Chip Memory Configuration and Altera Megafunction

    Started by fechp, May 15th, 2017 10:40 AM
    cyclone v, fpga, memory
    • Replies: 1
    • Views: 157
    May 19th, 2017, 10:58 AM Go to last post
  6. ALTLVDS Failing timing on simple interface

    Started by cooperman, May 15th, 2017 09:55 AM
    • Replies: 2
    • Views: 169
    May 19th, 2017, 08:50 AM Go to last post
  7. Remote software update via UART

    Started by Maciej357, May 17th, 2017 12:39 AM
    boot copier, flash, flash programming, rsu, uart
    • Replies: 0
    • Views: 145
    May 17th, 2017, 12:39 AM Go to last post
  8. on chip memory on system

    Started by nick8989, May 14th, 2017 11:13 PM
    • Replies: 3
    • Views: 236
    May 17th, 2017, 12:14 AM Go to last post
  9. “HSSI_REFCLK_CLUSTER” error on Arria 10

    Started by sslock, May 16th, 2017 02:31 PM
    • Replies: 0
    • Views: 101
    May 16th, 2017, 02:31 PM Go to last post
  10. PTP 1588 on Cyclone V

    Started by hardwareStudent, July 1st, 2014 11:18 PM
    2 Pages
    1 2
    • Replies: 10
    • Views: 15,508
    May 16th, 2017, 09:58 AM Go to last post
    • Replies: 1
    • Views: 178
    May 15th, 2017, 03:38 AM Go to last post
  11. Unhappy rs232 uart ip :: user guide

    Started by dipin555, May 8th, 2017 05:05 AM
    • Replies: 4
    • Views: 309
    May 15th, 2017, 12:39 AM Go to last post
  12. Implementing CAM (Content Addressable Memory) on Cyclone III

    Started by Modellpilot, March 17th, 2008 03:03 AM
    3 Pages
    1 2 3
    • Replies: 23
    • Views: 122,326
    May 14th, 2017, 06:13 PM Go to last post
    • Replies: 2
    • Views: 185
    May 13th, 2017, 01:27 AM Go to last post
  13. How to do a frequency multiplier?

    Started by GBCC, May 11th, 2017 07:32 PM
    • Replies: 1
    • Views: 203
    May 11th, 2017, 08:14 PM Go to last post
  14. SRAM DE2 - Problem

    Started by nick8989, May 10th, 2017 06:53 AM
    • Replies: 2
    • Views: 260
    May 11th, 2017, 09:03 AM Go to last post
  15. Unable to run different versions of altera libraires

    Started by Kalusu, March 20th, 2017 04:56 AM
    • Replies: 1
    • Views: 390
    May 8th, 2017, 06:15 PM Go to last post
  16. about MAX V open drain output maximum voltage

    Started by olkhram, May 8th, 2017 02:53 AM
    • Replies: 2
    • Views: 217
    May 8th, 2017, 06:10 AM Go to last post
  17. DE0-NANO Board External Clock

    Started by shauk, May 5th, 2017 01:31 AM
    • Replies: 8
    • Views: 458
    May 8th, 2017, 04:57 AM Go to last post
    • Replies: 2
    • Views: 323
    May 6th, 2017, 12:42 PM Go to last post
  18. DE0-Nano-SoC ADC

    Started by asicsoc, May 6th, 2017 08:48 AM
    • Replies: 0
    • Views: 197
    May 6th, 2017, 08:48 AM Go to last post
  19. MAX 10 Flash programming

    Started by KVL, May 2nd, 2017 02:44 AM
    2 Pages
    1 2
    • Replies: 11
    • Views: 782
    May 5th, 2017, 11:59 AM Go to last post
  20. Question MAX10 Programmable IOE Delay

    Started by masavoyat, April 28th, 2017 01:21 AM
    max10, programmable ioe delay
    • Replies: 3
    • Views: 414
    May 5th, 2017, 01:19 AM Go to last post
  21. Cyclone V HPS UART, can't rx data

    Started by cdhewitt88, November 4th, 2015 09:09 AM
    2 Pages
    1 2
    • Replies: 11
    • Views: 2,458
    May 4th, 2017, 05:06 AM Go to last post
  22. DDR3 burst lenght

    Started by CV_HAAN, April 28th, 2017 01:24 AM
    burst, ddr3
    • Replies: 3
    • Views: 374
    May 4th, 2017, 02:12 AM Go to last post
  23. Can I use USB-Blaster to debug the Cyclone IV device?

    Started by BOEING, May 3rd, 2017 07:49 PM
    • Replies: 1
    • Views: 222
    May 3rd, 2017, 11:49 PM Go to last post
  24. How to control the DATA input of a LUT

    Started by ingdxdy, May 2nd, 2017 07:21 PM
    • Replies: 2
    • Views: 275
    May 3rd, 2017, 07:58 PM Go to last post
  25. MAX10 flash memory address mapping

    Started by sruthi.1914, April 19th, 2017 11:58 PM
    altera on chip flash, cpld, max10
    • Replies: 2
    • Views: 584
    May 3rd, 2017, 04:03 PM Go to last post
  26. Program MAX3000 without JTAG?

    Started by wiggo, December 28th, 2008 07:47 AM
    • Replies: 8
    • Views: 52,390
    May 3rd, 2017, 01:50 AM Go to last post
  27. Question Altera DE0 Board not detected by Windows

    Started by jczanelli, May 2nd, 2017 10:30 AM
    • Replies: 3
    • Views: 352
    May 2nd, 2017, 04:35 PM Go to last post

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