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Forum: FPGA, Hardcopy, and CPLD Discussion

A place to discuss topics related to Altera's FPGA, CPLD, Hardcopy, and transceiver products (e.g. MAX, Stratix , Cyclone , GX, Hardcopy)

  1. 5CEBA9 Drop-in compatibility

    Started by buran16, Today 01:55 AM
    • Replies: 1
    • Views: 47
    Today, 06:50 AM Go to last post
  2. DDR3 burst lenght

    Started by CV_HAAN, Today 01:24 AM
    burst, ddr3
    • Replies: 0
    • Views: 30
    Today, 01:24 AM Go to last post
  3. Question MAX10 Programmable IOE Delay

    Started by masavoyat, Today 01:21 AM
    max10, programmable ioe delay
    • Replies: 0
    • Views: 28
    Today, 01:21 AM Go to last post
  4. MAX 10 internal configuration

    Started by KVL, Yesterday 10:06 PM
    • Replies: 5
    • Views: 94
    Today, 12:47 AM Go to last post
  5. DE2-70 SRAM timing question

    Started by brentnallt, Yesterday 07:04 AM
    de2-70, memory, sram, ssram
    • Replies: 1
    • Views: 82
    Yesterday, 11:55 PM Go to last post
    • Replies: 4
    • Views: 91
    Yesterday, 11:33 PM Go to last post
  6. Routing USB through FPGA

    Started by Camper, April 26th, 2017 02:40 AM
    • Replies: 7
    • Views: 265
    Yesterday, 01:51 PM Go to last post
    • Replies: 1
    • Views: 69
    Yesterday, 12:20 PM Go to last post
  7. JTAG Programming successfull but no effect at the ouput

    Started by mohsin_qau, April 20th, 2017 11:11 PM
    • Replies: 6
    • Views: 335
    Yesterday, 02:21 AM Go to last post
    • Replies: 2
    • Views: 158
    April 26th, 2017, 10:46 PM Go to last post
  8. set_input_delay And set_output_delay .SDC Constraints

    Started by techno-rogue, March 29th, 2017 07:33 AM
    3 Pages
    1 2 3
    • Replies: 24
    • Views: 1,464
    April 26th, 2017, 02:41 AM Go to last post
  9. How to check throughput?

    Started by aria_strat, April 25th, 2017 10:59 AM
    arria 10, latency, optimization, performance, throughput
    • Replies: 0
    • Views: 93
    April 25th, 2017, 10:59 AM Go to last post
    • Replies: 2
    • Views: 242
    April 25th, 2017, 03:20 AM Go to last post
  10. implementing distance sensor in my code

    Started by Skvaknin@gmail.com, April 19th, 2017 10:43 PM
    • Replies: 8
    • Views: 378
    April 25th, 2017, 01:55 AM Go to last post
  11. Booting NIOS from QSPI

    Started by ela05jdc, April 12th, 2017 08:35 AM
    boot, eds, nios, pfl, qspi
    • Replies: 3
    • Views: 350
    April 25th, 2017, 01:27 AM Go to last post
  12. Cyclone V GT Native PHY for 5Gbps USB 3.0?

    Started by JohnG300C, April 24th, 2017 07:06 PM
    • Replies: 0
    • Views: 100
    April 24th, 2017, 07:06 PM Go to last post
  13. mutliple VHDL designs maneuvering

    Started by Skvaknin@gmail.com, April 22nd, 2017 03:37 AM
    • Replies: 1
    • Views: 201
    April 22nd, 2017, 07:31 AM Go to last post
  14. MAX10 flash memory address mapping

    Started by sruthi.1914, April 19th, 2017 11:58 PM
    altera on chip flash, cpld, max10
    • Replies: 1
    • Views: 236
    April 21st, 2017, 01:21 PM Go to last post
  15. DE0-NANO Board SDC file and PLL

    Started by shauk, April 21st, 2017 02:14 AM
    • Replies: 1
    • Views: 175
    April 21st, 2017, 02:53 AM Go to last post
    • Replies: 5
    • Views: 2,293
    April 20th, 2017, 06:35 PM Go to last post
    • Replies: 2
    • Views: 222
    April 20th, 2017, 05:06 AM Go to last post
  16. MAX10 Discrete I2C implementation of RSU issue

    Started by OG_973, April 20th, 2017 03:37 AM
    • Replies: 1
    • Views: 157
    April 20th, 2017, 03:53 AM Go to last post
  17. Question PLDT-2 Trainer--

    Started by Ray Leiter, April 16th, 2017 04:25 PM
    pldt-2, rayl
    • Replies: 1
    • Views: 191
    April 19th, 2017, 01:25 AM Go to last post
  18. Why only Soft PCS for Altera's XAUI IP in Arria 10 GX?

    Started by fpgabuilder, April 18th, 2017 01:18 PM
    arria 10 gx, soft pcs, xaui
    • Replies: 0
    • Views: 152
    April 18th, 2017, 01:18 PM Go to last post
  19. Issue Configuring MAX10: "Can't Access JTAG Chain"

    Started by jrx07, April 11th, 2017 08:08 PM
    • Replies: 1
    • Views: 286
    April 17th, 2017, 10:07 AM Go to last post
  20. DDR3 HMC Timing issue with Qsys(device:5CGXFC5C6F27C7)

    Started by kerb, February 4th, 2015 10:18 PM
    • Replies: 2
    • Views: 4,196
    April 16th, 2017, 07:40 AM Go to last post
  21. error of PCIE PERST_N whe running fitter!

    Started by gransport, April 9th, 2017 11:51 PM
    • Replies: 3
    • Views: 313
    April 16th, 2017, 06:49 AM Go to last post
  22. DE0-Nano: Want to learn how to use

    Started by tdg8934, January 17th, 2017 10:26 AM
    • Replies: 4
    • Views: 454
    April 15th, 2017, 01:25 PM Go to last post
  23. Question MAX10 Flash Memory specifications

    Started by seairth, February 8th, 2015 05:24 PM
    2 Pages
    1 2
    • Replies: 13
    • Views: 5,381
    April 14th, 2017, 04:30 PM Go to last post
    • Replies: 0
    • Views: 250
    April 12th, 2017, 03:18 AM Go to last post

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