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Forum: FPGA, Hardcopy, and CPLD Discussion

A place to discuss topics related to Altera's FPGA, CPLD, Hardcopy, and transceiver products (e.g. MAX, Stratix , Cyclone , GX, Hardcopy)

  1. My first FPGA

    Started by StefanPendic, Today 04:39 AM
    • Replies: 1
    • Views: 40
    Today, 05:10 AM Go to last post
    • Replies: 0
    • Views: 32
    Today, 04:04 AM Go to last post
  2. Problem PIO

    Started by Kant, April 23rd, 2008 05:07 AM
    • Replies: 6
    • Views: 40,804
    Yesterday, 01:36 PM Go to last post
  3. 88e1111 phy

    Started by kharthik, May 23rd, 2017 10:14 PM
    • Replies: 1
    • Views: 89
    Yesterday, 01:42 AM Go to last post
    • Replies: 0
    • Views: 61
    Yesterday, 01:14 AM Go to last post
  4. Migrating from cyclone-1 to newer cyclone

    Started by zainka, May 23rd, 2017 05:15 AM
    • Replies: 1
    • Views: 80
    May 23rd, 2017, 06:51 AM Go to last post
  5. Cyclone II PLL clock multiplier

    Started by znac049, May 22nd, 2017 02:46 AM
    • Replies: 4
    • Views: 143
    May 23rd, 2017, 12:01 AM Go to last post
  6. Cyclone IV E Remote Update problem

    Started by stephua, October 28th, 2013 08:31 PM
    • Replies: 2
    • Views: 22,713
    May 22nd, 2017, 06:18 PM Go to last post
  7. Cyclone V remote update

    Started by haikuotiankonghou, May 22nd, 2017 05:42 PM
    remote update cyclonev
    • Replies: 0
    • Views: 72
    May 22nd, 2017, 05:42 PM Go to last post
  8. Altera On-Chip Flash IP Core

    Started by john7, May 15th, 2017 10:03 PM
    • Replies: 2
    • Views: 258
    May 22nd, 2017, 12:04 AM Go to last post
  9. communication using rs232 to pc

    Started by dipin555, May 5th, 2017 03:35 AM
    • Replies: 1
    • Views: 336
    May 21st, 2017, 06:52 AM Go to last post
  10. Help with setting up Cyclone V GT dev kit

    Started by matthewyih, May 16th, 2017 05:29 PM
    • Replies: 1
    • Views: 210
    May 19th, 2017, 10:59 AM Go to last post
  11. On Chip Memory Configuration and Altera Megafunction

    Started by fechp, May 15th, 2017 10:40 AM
    cyclone v, fpga, memory
    • Replies: 1
    • Views: 213
    May 19th, 2017, 10:58 AM Go to last post
  12. ALTLVDS Failing timing on simple interface

    Started by cooperman, May 15th, 2017 09:55 AM
    • Replies: 2
    • Views: 224
    May 19th, 2017, 08:50 AM Go to last post
  13. Remote software update via UART

    Started by Maciej357, May 17th, 2017 12:39 AM
    boot copier, flash, flash programming, rsu, uart
    • Replies: 0
    • Views: 184
    May 17th, 2017, 12:39 AM Go to last post
  14. on chip memory on system

    Started by nick8989, May 14th, 2017 11:13 PM
    • Replies: 3
    • Views: 295
    May 17th, 2017, 12:14 AM Go to last post
  15. “HSSI_REFCLK_CLUSTER” error on Arria 10

    Started by sslock, May 16th, 2017 02:31 PM
    • Replies: 0
    • Views: 142
    May 16th, 2017, 02:31 PM Go to last post
  16. PTP 1588 on Cyclone V

    Started by hardwareStudent, July 1st, 2014 11:18 PM
    2 Pages
    1 2
    • Replies: 10
    • Views: 15,590
    May 16th, 2017, 09:58 AM Go to last post
    • Replies: 1
    • Views: 229
    May 15th, 2017, 03:38 AM Go to last post
  17. Unhappy rs232 uart ip :: user guide

    Started by dipin555, May 8th, 2017 05:05 AM
    • Replies: 4
    • Views: 382
    May 15th, 2017, 12:39 AM Go to last post
  18. Implementing CAM (Content Addressable Memory) on Cyclone III

    Started by Modellpilot, March 17th, 2008 03:03 AM
    3 Pages
    1 2 3
    • Replies: 23
    • Views: 122,507
    May 14th, 2017, 06:13 PM Go to last post
    • Replies: 2
    • Views: 242
    May 13th, 2017, 01:27 AM Go to last post
  19. How to do a frequency multiplier?

    Started by GBCC, May 11th, 2017 07:32 PM
    • Replies: 1
    • Views: 253
    May 11th, 2017, 08:14 PM Go to last post
  20. SRAM DE2 - Problem

    Started by nick8989, May 10th, 2017 06:53 AM
    • Replies: 2
    • Views: 339
    May 11th, 2017, 09:03 AM Go to last post
  21. Unable to run different versions of altera libraires

    Started by Kalusu, March 20th, 2017 04:56 AM
    • Replies: 1
    • Views: 426
    May 8th, 2017, 06:15 PM Go to last post
  22. about MAX V open drain output maximum voltage

    Started by olkhram, May 8th, 2017 02:53 AM
    • Replies: 2
    • Views: 268
    May 8th, 2017, 06:10 AM Go to last post
  23. DE0-NANO Board External Clock

    Started by shauk, May 5th, 2017 01:31 AM
    • Replies: 8
    • Views: 526
    May 8th, 2017, 04:57 AM Go to last post
    • Replies: 2
    • Views: 365
    May 6th, 2017, 12:42 PM Go to last post
  24. DE0-Nano-SoC ADC

    Started by asicsoc, May 6th, 2017 08:48 AM
    • Replies: 0
    • Views: 245
    May 6th, 2017, 08:48 AM Go to last post
  25. MAX 10 Flash programming

    Started by KVL, May 2nd, 2017 02:44 AM
    2 Pages
    1 2
    • Replies: 11
    • Views: 879
    May 5th, 2017, 11:59 AM Go to last post

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