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Forum: FPGA, Hardcopy, and CPLD Discussion

A place to discuss topics related to Altera's FPGA, CPLD, Hardcopy, and transceiver products (e.g. MAX, Stratix , Cyclone , GX, Hardcopy)

  1. Lightbulb hold time violation using MAX V

    Started by handaxiao, September 21st, 2017 10:41 PM
    • Replies: 3
    • Views: 90
    Today, 12:15 AM Go to last post
    • Replies: 0
    • Views: 45
    Yesterday, 03:36 PM Go to last post
  2. Erasing MAX-V devices using commandline option.

    Started by moderator1983, September 21st, 2017 12:34 PM
    • Replies: 0
    • Views: 69
    September 21st, 2017, 12:34 PM Go to last post
  3. Epm3032atc44

    Started by jebag, September 20th, 2017 01:27 AM
    • Replies: 3
    • Views: 172
    September 21st, 2017, 12:32 PM Go to last post
    • Replies: 2
    • Views: 134
    September 21st, 2017, 09:47 AM Go to last post
  4. MAX 10 and the STAPL byte-code player

    Started by LordNikon, March 2nd, 2017 04:27 AM
    jtag, max10, stapl, stm
    • Replies: 2
    • Views: 619
    September 21st, 2017, 06:23 AM Go to last post
    • Replies: 0
    • Views: 88
    September 20th, 2017, 10:39 PM Go to last post
  5. How to configure sampling instant in MAX10 ADC ?

    Started by Max10Teleco, September 20th, 2017 03:42 AM
    • Replies: 1
    • Views: 114
    September 20th, 2017, 09:38 AM Go to last post
    • Replies: 0
    • Views: 52
    September 20th, 2017, 04:42 AM Go to last post
    • Replies: 1
    • Views: 125
    September 19th, 2017, 11:50 PM Go to last post
    • Replies: 8
    • Views: 320
    September 19th, 2017, 08:28 PM Go to last post
  6. Angry emif avalon handshake signals are unstable.

    Started by Rene Meessen, September 14th, 2017 12:08 PM
    • Replies: 1
    • Views: 205
    September 19th, 2017, 04:04 PM Go to last post
  7. How to set clock crossings correctly

    Started by bsdevlin, June 10th, 2017 09:02 AM
    • Replies: 2
    • Views: 337
    September 19th, 2017, 06:20 AM Go to last post
  8. how to initialize f2h_sdram from system console

    Started by peiserma, September 15th, 2017 11:49 AM
    • Replies: 1
    • Views: 179
    September 19th, 2017, 04:42 AM Go to last post
  9. Arria 10 core PLL error 15744

    Started by petter, September 15th, 2017 10:35 PM
    • Replies: 1
    • Views: 181
    September 18th, 2017, 11:35 AM Go to last post
  10. Using PCIe pins as GPIO on Cyclone IV GX FPGA Development Kit

    Started by DinoFPGA, September 18th, 2017 10:02 AM
    • Replies: 1
    • Views: 106
    September 18th, 2017, 10:57 AM Go to last post
  11. Cyclone ii FPGA eeprom erasing

    Started by hareesh9415, September 11th, 2017 11:06 PM
    eeprom, fpga
    • Replies: 6
    • Views: 312
    September 18th, 2017, 02:35 AM Go to last post
  12. how to program epm240 with MCU?

    Started by jingwei815, September 18th, 2017 01:06 AM
    • Replies: 1
    • Views: 114
    September 18th, 2017, 02:00 AM Go to last post
  13. Reading the mAX ii ufm

    Started by hareesh9415, September 14th, 2017 08:05 PM
    fpga, max ii, ufm
    • Replies: 3
    • Views: 225
    September 18th, 2017, 01:51 AM Go to last post
  14. Constraining byte deserializer after ALTLVDS_RX

    Started by leonid_62, September 18th, 2017 01:29 AM
    altlvds_rx, deserializer, lvds, timequest
    • Replies: 0
    • Views: 102
    September 18th, 2017, 01:29 AM Go to last post
  15. Parser for (Altera) FPGA programming files

    Started by tv84, September 14th, 2017 12:41 PM
    • Replies: 3
    • Views: 241
    September 16th, 2017, 09:33 AM Go to last post
  16. MAX10 10M08SAE144I7G Not Working

    Started by rasemeng, September 14th, 2017 09:43 AM
    • Replies: 3
    • Views: 306
    September 16th, 2017, 01:04 AM Go to last post
    • Replies: 5
    • Views: 2,408
    September 15th, 2017, 04:41 PM Go to last post
  17. Not able to send ethernet frame from FPGA to windows PC

    Started by victor298, September 14th, 2017 12:26 AM
    • Replies: 1
    • Views: 198
    September 15th, 2017, 10:18 AM Go to last post
    • Replies: 0
    • Views: 66
    September 15th, 2017, 07:51 AM Go to last post
  18. Max 10 Unconstrained clock in onchip_flash

    Started by OG_973, February 7th, 2017 09:40 AM
    max10, on_chip_flash, unconstrained clock
    • Replies: 5
    • Views: 1,096
    September 15th, 2017, 03:32 AM Go to last post
    • Replies: 0
    • Views: 151
    September 14th, 2017, 11:07 AM Go to last post
  19. My first experience with altera (MAX 10). And it didn't go well...

    Started by jipihorn, September 10th, 2017 01:11 AM
    2 Pages
    1 2
    max 10
    • Replies: 12
    • Views: 655
    September 14th, 2017, 10:49 AM Go to last post
  20. Cool HSMC extension cards

    Started by donwilde1, September 13th, 2017 09:38 AM
    daughter card, hsmc, max, optane
    • Replies: 0
    • Views: 190
    September 13th, 2017, 09:38 AM Go to last post
  21. Pseudo Open-Drain 1.35V support

    Started by cbolson1, September 12th, 2017 07:58 AM
    gddr, i/o, pod
    • Replies: 0
    • Views: 189
    September 12th, 2017, 07:58 AM Go to last post

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