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Forum: FPGA, Hardcopy, and CPLD Discussion

A place to discuss topics related to Altera's FPGA, CPLD, Hardcopy, and transceiver products (e.g. MAX, Stratix , Cyclone , GX, Hardcopy)

  1. BLVDS termination for MAX 10

    Started by Pdonegan, October 19th, 2017 09:54 AM
    blvds, max 10, termination
    • Replies: 3
    • Views: 158
    Today, 01:29 AM Go to last post
  2. Obtain a pof from MAX 10 internal flash?

    Started by k1029384756, Yesterday 03:22 PM
    flash, max10, pof
    • Replies: 2
    • Views: 95
    Today, 01:05 AM Go to last post
  3. MAX10 Multi Nios2 boot on UFM

    Started by Lollius, July 8th, 2017 12:10 AM
    • Replies: 3
    • Views: 616
    Yesterday, 08:34 AM Go to last post
  4. SPI ram and Nios on FPGA MAX10

    Started by perryiavo, Yesterday 01:59 AM
    max10, nios, ram, spi, spi ram
    • Replies: 2
    • Views: 129
    Yesterday, 04:56 AM Go to last post
  5. I can not able to configure fpga to quartus

    Started by sasi1922, October 19th, 2017 06:53 AM
    • Replies: 8
    • Views: 249
    Yesterday, 03:29 AM Go to last post
  6. Unconstrained Path in PFL IP core

    Started by shauk, October 18th, 2017 10:32 PM
    • Replies: 0
    • Views: 138
    October 18th, 2017, 10:32 PM Go to last post
    • Replies: 3
    • Views: 283
    October 18th, 2017, 06:27 PM Go to last post
  7. MAX10 TSD - ADC Toolkit results in BSoD on Windows 10

    Started by abaylis, October 11th, 2017 09:33 AM
    • Replies: 4
    • Views: 342
    October 18th, 2017, 05:47 PM Go to last post
    • Replies: 0
    • Views: 133
    October 18th, 2017, 12:25 PM Go to last post
  8. MAX10 .JBC programming - bogus verify fail errors

    Started by arg, October 16th, 2017 01:37 PM
    • Replies: 1
    • Views: 170
    October 18th, 2017, 02:25 AM Go to last post
  9. Parallel Flash Loader for MAX V

    Started by shauk, October 16th, 2017 12:47 AM
    • Replies: 2
    • Views: 211
    October 16th, 2017, 11:42 PM Go to last post
  10. DDR4 Memory Model for simulation

    Started by devreddy.404, October 29th, 2015 04:45 AM
    • Replies: 2
    • Views: 2,376
    October 16th, 2017, 02:43 AM Go to last post
  11. FPGA Transceiver connection

    Started by kharthik, October 14th, 2017 05:34 AM
    • Replies: 2
    • Views: 279
    October 15th, 2017, 07:27 PM Go to last post
  12. Minimal Cost configuration - Cyclone IV

    Started by rod@ariradesign.com, October 10th, 2017 12:19 PM
    • Replies: 5
    • Views: 401
    October 13th, 2017, 12:41 AM Go to last post
  13. Question EPM1270GF256I-5 is supported by Quartus 15.1 ?

    Started by stepph74, October 11th, 2017 03:06 AM
    • Replies: 2
    • Views: 266
    October 11th, 2017, 04:26 AM Go to last post
  14. Error when using University Program VwF

    Started by powermax, December 30th, 2016 10:58 AM
    • Replies: 7
    • Views: 6,043
    October 10th, 2017, 09:47 AM Go to last post
    • Replies: 2
    • Views: 308
    October 10th, 2017, 01:05 AM Go to last post
  15. Strange effects with NIOS in design

    Started by Don_Camillo, October 5th, 2017 10:30 PM
    • Replies: 4
    • Views: 456
    October 9th, 2017, 10:34 PM Go to last post
  16. Altera Avalon I2C(Master) Core not working for Cyclone V?

    Started by QsXiang, October 9th, 2017 08:06 AM
    • Replies: 0
    • Views: 240
    October 9th, 2017, 08:06 AM Go to last post
    • Replies: 1
    • Views: 239
    October 9th, 2017, 01:14 AM Go to last post
    • Replies: 0
    • Views: 214
    October 8th, 2017, 11:59 PM Go to last post
  17. MAX10 CONFIG_SEL Problem

    Started by koelbl, October 4th, 2017 07:35 AM
    • Replies: 1
    • Views: 348
    October 8th, 2017, 11:14 PM Go to last post
  18. Can't connect to MAX10 custom PCB

    Started by Tekilla, October 8th, 2017 11:11 PM
    • Replies: 0
    • Views: 73
    October 8th, 2017, 11:11 PM Go to last post
  19. Nios II and Python

    Started by victor298, October 4th, 2017 07:01 PM
    • Replies: 2
    • Views: 391
    October 5th, 2017, 10:37 AM Go to last post
  20. Erasing MAX-V devices using commandline option.

    Started by moderator1983, September 21st, 2017 12:34 PM
    • Replies: 5
    • Views: 602
    October 4th, 2017, 09:55 AM Go to last post
  21. DE0-CV board control panel

    Started by mmostafa, October 4th, 2017 06:51 AM
    • Replies: 0
    • Views: 281
    October 4th, 2017, 06:51 AM Go to last post
  22. Problems with ibis model for EP2S60 (Stratix II)

    Started by Sesmor, October 4th, 2017 03:27 AM
    • Replies: 0
    • Views: 285
    October 4th, 2017, 03:27 AM Go to last post
  23. MAX10 Dual Configuraion IP

    Started by sruthi.1914, July 17th, 2017 03:13 AM
    cpld, max10 - rsu, remote system upgrade
    • Replies: 2
    • Views: 500
    October 4th, 2017, 01:35 AM Go to last post
  24. Minimum pulse width error

    Started by simenhs, October 2nd, 2017 12:11 AM
    • Replies: 3
    • Views: 513
    October 3rd, 2017, 07:35 PM Go to last post
  25. Memory SRAM/FLASH in DE1 Altera setting address problems

    Started by CTrigger, September 25th, 2017 08:55 AM
    • Replies: 1
    • Views: 387
    October 1st, 2017, 03:20 PM Go to last post

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