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Forum: Quartus II and EDA Tools Discussion

A place to discuss topics related to Altera's development tool as well as 3rd Party EDA tools for synthesis and simulation

  1. Error 10500: VHDL Syntax

    Started by Braindead90, October 31st, 2012 12:40 PM
    2 Pages
    1 2
    • Replies: 15
    • Views: 40,026
    Today, 03:07 PM Go to last post
    • Replies: 3
    • Views: 27
    Today, 02:45 PM Go to last post
  2. Question Current Limit Exceeded

    Started by djp, Today 02:34 AM
    current limit, max5
    • Replies: 1
    • Views: 56
    Today, 12:02 PM Go to last post
  3. Cool Hello World!

    Started by Sniffer, Today 11:03 AM
    • Replies: 0
    • Views: 34
    Today, 11:03 AM Go to last post
    • Replies: 0
    • Views: 20
    Today, 09:15 AM Go to last post
  4. avalon fifo issue - module dependency loop

    Started by coverman, March 31st, 2010 01:03 PM
    • Replies: 2
    • Views: 35,143
    Today, 01:42 AM Go to last post
  5. Modelsim covergroups with PSL

    Started by dams0622, January 12th, 2017 06:14 AM
    • Replies: 2
    • Views: 75
    Yesterday, 11:36 PM Go to last post
  6. Question Glitchs on a counter

    Started by AlexisC, Yesterday 03:18 AM
    • Replies: 1
    • Views: 59
    Yesterday, 06:49 AM Go to last post
  7. Using different color of signals in ModelSim

    Started by Hozan677, January 14th, 2017 02:10 PM
    • Replies: 1
    • Views: 57
    January 14th, 2017, 02:51 PM Go to last post
    • Replies: 1
    • Views: 52
    January 14th, 2017, 09:14 AM Go to last post
    • Replies: 3
    • Views: 78
    January 13th, 2017, 07:05 AM Go to last post
    • Replies: 1
    • Views: 71
    January 13th, 2017, 01:29 AM Go to last post
  8. Trigger-Out--->Trigger-In AND ...

    Started by systom, January 12th, 2017 01:53 PM
    signaltap trigger-in
    • Replies: 4
    • Views: 88
    January 12th, 2017, 07:03 PM Go to last post
  9. missing sopcinfo file after QSYS system generation?

    Started by JeffreyOHill, January 12th, 2017 05:32 PM
    qsys generate
    • Replies: 0
    • Views: 40
    January 12th, 2017, 05:32 PM Go to last post
  10. Root Region in Quartus Pro ?

    Started by ootang, January 12th, 2017 05:30 PM
    • Replies: 0
    • Views: 47
    January 12th, 2017, 05:30 PM Go to last post
  11. Setup default project location

    Started by Pavel_47, January 12th, 2017 06:14 AM
    • Replies: 0
    • Views: 49
    January 12th, 2017, 06:14 AM Go to last post
  12. Windows vs Linux tool set

    Started by dpoznan, January 10th, 2017 08:14 AM
    windows-linux
    • Replies: 7
    • Views: 201
    January 11th, 2017, 05:54 AM Go to last post
  13. Modelsim is exiting with code 211.

    Started by ebber, November 17th, 2016 07:09 AM
    • Replies: 8
    • Views: 548
    January 11th, 2017, 04:49 AM Go to last post
  14. Can not load .sof file to the actual FPGA chip

    Started by yahdskjas, January 9th, 2017 04:09 PM
    • Replies: 3
    • Views: 93
    January 10th, 2017, 12:16 PM Go to last post
  15. gate lev sim not working as expected

    Started by de0_nano, December 15th, 2016 12:45 PM
    3 Pages
    1 2 3
    • Replies: 21
    • Views: 551
    January 10th, 2017, 10:08 AM Go to last post
  16. boot_rom regeneration for NIOS cpu

    Started by AROBERT, January 10th, 2017 02:45 AM
    boot_rom, remote update
    • Replies: 0
    • Views: 59
    January 10th, 2017, 02:45 AM Go to last post
  17. The Value of tx_pll_m_divider is invalid

    Started by TangoDesigner07, January 9th, 2017 06:22 AM
    10gbase-r, altera ip, pma
    • Replies: 0
    • Views: 63
    January 9th, 2017, 06:22 AM Go to last post
  18. Programming MAX 10 with .mif

    Started by JacobJ, January 9th, 2017 12:52 AM
    memory, mif, quartus
    • Replies: 5
    • Views: 136
    January 9th, 2017, 06:02 AM Go to last post
  19. Set undriven outputs to VCC / GND

    Started by Pavel_47, January 7th, 2017 11:30 AM
    undriven outputs
    • Replies: 5
    • Views: 151
    January 8th, 2017, 09:14 AM Go to last post
    • Replies: 2
    • Views: 535
    January 7th, 2017, 12:57 PM Go to last post
  20. SignalTap II Time Bars not displayed

    Started by corestar, November 29th, 2016 09:04 PM
    • Replies: 4
    • Views: 243
    January 6th, 2017, 02:34 PM Go to last post
  21. Error (176310): Can't place multiple pins - JTAG Sharing

    Started by systom, January 5th, 2017 01:00 PM
    176310 jtag dual-purpose
    • Replies: 4
    • Views: 153
    January 6th, 2017, 09:15 AM Go to last post
    • Replies: 1
    • Views: 32,490
    January 6th, 2017, 03:25 AM Go to last post
  22. USB Programmer

    Started by joe306, January 5th, 2017 07:10 AM
    • Replies: 1
    • Views: 100
    January 6th, 2017, 03:01 AM Go to last post
  23. Quartus 13.0 doesn't detect qdz file

    Started by mahmood, January 5th, 2017 04:20 AM
    • Replies: 3
    • Views: 108
    January 6th, 2017, 02:35 AM Go to last post

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