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Forum: Quartus II and EDA Tools Discussion

A place to discuss topics related to Altera's development tool as well as 3rd Party EDA tools for synthesis and simulation

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  1. SDC - What clock should the input pin be relative to?

    Started by shaiko, March 18th, 2017 04:37 AM
    2 Pages
    1 2
    • Replies: 16
    • Views: 386
    March 23rd, 2017, 08:25 PM Go to last post
  2. quartus 2 >> qsys >> conduit signals export error

    Started by dipin555, August 26th, 2016 01:21 AM
    • Replies: 3
    • Views: 664
    March 23rd, 2017, 05:02 AM Go to last post
    • Replies: 0
    • Views: 55
    March 23rd, 2017, 04:59 AM Go to last post
  3. Downloading ELF Process failed when executing from flash

    Started by ebber, December 6th, 2016 07:02 AM
    • Replies: 1
    • Views: 236
    March 21st, 2017, 03:19 PM Go to last post
  4. Generating QSYS from Command Line

    Started by mhathaway, March 21st, 2017 09:31 AM
    command line, ip-generate
    • Replies: 0
    • Views: 84
    March 21st, 2017, 09:31 AM Go to last post
  5. Question IP_Compiler for PCI Express - timing constraints

    Started by The Smith, March 21st, 2017 05:40 AM
    • Replies: 0
    • Views: 71
    March 21st, 2017, 05:40 AM Go to last post
  6. MegaWizard Plug-In Manager hangs when making a PLL (Quartus II v14.1.1)

    Started by BobCollins, February 1st, 2015 08:58 PM
    2 Pages
    1 2
    14.1, altpll, crash, hang, megawizard
    • Replies: 14
    • Views: 9,322
    March 20th, 2017, 07:43 AM Go to last post
    • Replies: 9
    • Views: 2,221
    March 20th, 2017, 05:04 AM Go to last post
  7. What's the difference between these two pieces of simple code?

    Started by skyjuice88, March 13th, 2017 10:23 PM
    2 Pages
    1 2
    • Replies: 10
    • Views: 242
    March 20th, 2017, 01:55 AM Go to last post
  8. Post Zero extender and zero checker

    Started by hazem94, March 19th, 2017 06:50 AM
    • Replies: 4
    • Views: 114
    March 19th, 2017, 10:31 AM Go to last post
    • Replies: 3
    • Views: 136
    March 16th, 2017, 01:51 AM Go to last post
  9. Can actual delays be implemented with .sdc constrains?

    Started by vlrean, March 10th, 2017 12:46 AM
    2 Pages
    1 2
    • Replies: 14
    • Views: 468
    March 15th, 2017, 10:03 AM Go to last post
  10. How can I delete the megafunction in the Project?

    Started by Richyway, March 15th, 2017 06:05 AM
    • Replies: 0
    • Views: 84
    March 15th, 2017, 06:05 AM Go to last post
  11. SignalTap II fails to acquire events

    Started by shaiko, March 13th, 2017 03:48 PM
    • Replies: 7
    • Views: 216
    March 15th, 2017, 02:43 AM Go to last post
    • Replies: 8
    • Views: 303
    March 15th, 2017, 01:43 AM Go to last post
  12. No SDO file produced for Timing Simulation

    Started by epdev, March 12th, 2017 01:21 PM
    • Replies: 2
    • Views: 123
    March 14th, 2017, 01:52 AM Go to last post
  13. qsys-script: how to decent into hierarchy

    Started by arne, March 13th, 2017 11:55 PM
    • Replies: 0
    • Views: 85
    March 13th, 2017, 11:55 PM Go to last post
  14. Post Quartus crashes during simulation

    Started by vini.simoes, March 9th, 2017 12:03 PM
    • Replies: 2
    • Views: 134
    March 13th, 2017, 11:14 PM Go to last post
    • Replies: 1
    • Views: 126
    March 13th, 2017, 01:56 PM Go to last post
  15. Logic Analyzer Interface Invalid Device

    Started by deBoogle, March 9th, 2017 11:33 PM
    • Replies: 1
    • Views: 110
    March 13th, 2017, 01:55 PM Go to last post
  16. Can't launch the Modelsim-Altera Software

    Started by vitruvius, November 22nd, 2013 12:35 PM
    2 Pages
    1 2
    • Replies: 18
    • Views: 46,138
    March 13th, 2017, 03:05 AM Go to last post
  17. How do I use N25Q512 Quad-SPI Flash, instead of ECPQ512?

    Started by NicholasLee, January 8th, 2016 02:43 PM
    3 Pages
    1 2 3
    • Replies: 27
    • Views: 5,825
    March 11th, 2017, 05:50 AM Go to last post
  18. Run fitter only

    Started by droe, March 10th, 2017 12:11 AM
    fitter
    • Replies: 2
    • Views: 146
    March 10th, 2017, 12:58 AM Go to last post
    • Replies: 0
    • Views: 105
    March 9th, 2017, 08:20 AM Go to last post
  19. SignalTap: Start Rapid Recompile to continue

    Started by fpgabuilder, March 8th, 2017 10:50 AM
    signaltap, trigger
    • Replies: 1
    • Views: 155
    March 9th, 2017, 03:19 AM Go to last post
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    • Views: 120
    March 8th, 2017, 08:05 AM Go to last post
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    March 8th, 2017, 07:36 AM Go to last post
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    • Views: 133
    March 7th, 2017, 10:10 PM Go to last post

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