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Forum: VHDL

A place to ask VHDL questions

  1. Sticky Thread Sticky: *** Read Me ***

    Started by BadOmen, October 5th, 2012 12:52 PM
    • Replies: 6
    • Views: 48,471
    October 28th, 2015, 12:36 PM Go to last post
  1. write code vhdl cruise control how ???

    Started by saef91, March 29th, 2016 03:49 AM
    3 Pages
    1 2 3
    • Replies: 27
    • Views: 5,159
    April 19th, 2016, 07:59 PM Go to last post
  2. Post About VGA Output

    Started by pnayak15, April 10th, 2016 09:02 PM
    3 Pages
    1 2 3
    • Replies: 28
    • Views: 6,587
    April 18th, 2016, 08:34 PM Go to last post
  3. Question Shift left register using VHDL shift operator : sll trouble

    Started by anviori, April 12th, 2016 08:29 PM
    vhdl
    • Replies: 1
    • Views: 1,638
    April 12th, 2016, 10:03 PM Go to last post
  4. avoir bounce with button

    Started by renaudvdg, April 8th, 2016 02:46 PM
    • Replies: 2
    • Views: 1,204
    April 11th, 2016, 05:27 AM Go to last post
  5. Smile clock problem

    Started by jalal11, April 8th, 2016 08:54 AM
    • Replies: 1
    • Views: 925
    April 11th, 2016, 05:21 AM Go to last post
    • Replies: 8
    • Views: 5,133
    April 10th, 2016, 06:19 PM Go to last post
    • Replies: 3
    • Views: 1,562
    April 10th, 2016, 05:10 AM Go to last post
  6. controlling dc motor using PWM technique

    Started by FATI, April 6th, 2016 05:33 AM
    • Replies: 1
    • Views: 850
    April 6th, 2016, 08:34 AM Go to last post
  7. code for Uart communication

    Started by velton mushanguri, April 4th, 2016 08:35 AM
    • Replies: 2
    • Views: 954
    April 5th, 2016, 02:59 AM Go to last post
  8. Use DSP Block instead of LUT using Arria 10

    Started by ManalXXX, April 5th, 2016 01:54 AM
    • Replies: 0
    • Views: 932
    April 5th, 2016, 01:54 AM Go to last post
  9. Condition when in vhdl code

    Started by renaudvdg, March 30th, 2016 07:43 AM
    • Replies: 9
    • Views: 1,758
    March 31st, 2016, 12:58 AM Go to last post
  10. network analyzer

    Started by levw, March 30th, 2016 04:27 AM
    • Replies: 9
    • Views: 1,979
    March 30th, 2016, 05:42 PM Go to last post
  11. Gated clocks

    Started by what the vhdl, March 15th, 2016 08:05 AM
    • Replies: 3
    • Views: 1,277
    March 27th, 2016, 05:37 AM Go to last post
  12. quartus 2: can't determine definition of operator "*"

    Started by antoniopedro, February 24th, 2016 09:20 AM
    2 Pages
    1 2
    quartus, vhdl
    • Replies: 12
    • Views: 4,659
    March 24th, 2016, 03:21 PM Go to last post
  13. Column Scanning Matrix in VHDL

    Started by blogger1234, March 24th, 2016 04:54 AM
    vhdl matrix column row
    • Replies: 1
    • Views: 1,067
    March 24th, 2016, 05:20 AM Go to last post
    • Replies: 9
    • Views: 3,252
    March 24th, 2016, 12:05 AM Go to last post
  14. Identifier "UNSIGNED" is not directly visible

    Started by 214ee1179, March 21st, 2016 11:10 PM
    • Replies: 7
    • Views: 5,683
    March 22nd, 2016, 01:44 AM Go to last post
    • Replies: 7
    • Views: 4,318
    March 18th, 2016, 12:41 AM Go to last post
  15. Gate Level Simulation Error

    Started by Atari625, March 17th, 2016 05:27 PM
    • Replies: 1
    • Views: 1,774
    March 17th, 2016, 05:47 PM Go to last post
  16. Comparison between old value and new value

    Started by usman1818, March 16th, 2016 05:49 AM
    2 Pages
    1 2
    vhdl programming
    • Replies: 15
    • Views: 3,215
    March 17th, 2016, 04:18 AM Go to last post
  17. Deo Nano Beginer problem

    Started by Nahian, March 8th, 2016 09:43 AM
    • Replies: 3
    • Views: 1,762
    March 16th, 2016, 10:49 PM Go to last post
  18. Altera Dual Port RAM bytes shifting error.

    Started by Muralidhars, March 16th, 2016 07:06 AM
    • Replies: 0
    • Views: 1,295
    March 16th, 2016, 07:06 AM Go to last post
    • Replies: 2
    • Views: 1,906
    March 15th, 2016, 05:17 AM Go to last post
  19. Question Can't create a VHDL file in Quartus

    Started by sunflower, March 9th, 2016 01:10 PM
    • Replies: 3
    • Views: 1,526
    March 14th, 2016, 01:21 PM Go to last post
  20. Interfacing of Modelsim and MATLAB

    Started by NIDHI PANDA, March 14th, 2016 01:57 AM
    • Replies: 1
    • Views: 1,205
    March 14th, 2016, 03:51 AM Go to last post
  21. VHDL DE2 board - write bmp file to SDRAM display via vga

    Started by avivb, February 21st, 2016 07:39 AM
    • Replies: 2
    • Views: 1,791
    March 11th, 2016, 07:03 AM Go to last post
    • Replies: 1
    • Views: 1,354
    March 9th, 2016, 01:40 AM Go to last post
    • Replies: 1
    • Views: 1,525
    March 9th, 2016, 01:34 AM Go to last post
  22. Universal Shift register help( in structrual)

    Started by insanegoon, March 7th, 2016 05:56 PM
    • Replies: 4
    • Views: 2,030
    March 8th, 2016, 12:32 PM Go to last post
  23. Audio Processor Using FPGA SPARTAN 6

    Started by melpin@altera, March 4th, 2016 07:03 AM
    adc, audio, fpga, spartan 6, spi
    • Replies: 2
    • Views: 2,192
    March 7th, 2016, 01:45 AM Go to last post

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