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Forum: VHDL

A place to ask VHDL questions

  1. Sticky Thread Sticky: *** Read Me ***

    Started by BadOmen, October 5th, 2012 01:52 PM
    • Replies: 6
    • Views: 46,539
    October 28th, 2015, 01:36 PM Go to last post
  1. Post Error (10327): undefined operator ""=""

    Started by Anis, March 13th, 2013 09:18 AM
    error (10327)
    • Replies: 9
    • Views: 31,250
    March 14th, 2013, 01:26 AM Go to last post
  2. Please send me in the correct direction.

    Started by qwertyberty, March 7th, 2013 02:08 AM
    • Replies: 3
    • Views: 29,890
    March 13th, 2013, 02:54 PM Go to last post
  3. Error (10822): couldn't implement registers for assignments on this clock edge

    Started by wesseln, December 19th, 2012 01:33 PM
    3 Pages
    1 2 3
    • Replies: 21
    • Views: 47,044
    March 13th, 2013, 09:45 AM Go to last post
  4. What data types can be synthesis in VHDL

    Started by buddha1987, February 14th, 2013 07:26 PM
    • Replies: 7
    • Views: 34,401
    March 12th, 2013, 07:53 AM Go to last post
  5. re: VHDL/verilog code to resize an image

    Started by shuklaankita, March 12th, 2013 07:41 AM
    its urgent
    • Replies: 1
    • Views: 31,016
    March 12th, 2013, 07:43 AM Go to last post
  6. need helps in coding...

    Started by faizul hassan, March 9th, 2013 01:55 AM
    • Replies: 3
    • Views: 26,983
    March 12th, 2013, 01:20 AM Go to last post
  7. set size of binary number?

    Started by martinwoc, March 7th, 2013 08:58 AM
    • Replies: 5
    • Views: 29,614
    March 8th, 2013, 03:03 AM Go to last post
    • Replies: 5
    • Views: 31,740
    March 8th, 2013, 02:42 AM Go to last post
  8. arrays

    Started by martinwoc, March 7th, 2013 08:52 AM
    • Replies: 3
    • Views: 32,104
    March 8th, 2013, 02:41 AM Go to last post
  9. 16 bit one hot vector to 5 bit vector

    Started by jaggu, March 7th, 2013 02:11 PM
    • Replies: 3
    • Views: 31,962
    March 8th, 2013, 01:09 AM Go to last post
  10. de2 board expansion header

    Started by faizul hassan, March 6th, 2013 03:18 PM
    • Replies: 8
    • Views: 34,046
    March 7th, 2013, 10:57 AM Go to last post
  11. simple VHDL program --> need help please

    Started by moshik, March 5th, 2013 03:18 AM
    • Replies: 7
    • Views: 29,193
    March 5th, 2013, 08:52 AM Go to last post
  12. Angry PC Device communication howto

    Started by g.glowacki, January 21st, 2013 03:34 AM
    2 Pages
    1 2
    • Replies: 18
    • Views: 34,239
    March 4th, 2013, 11:55 PM Go to last post
  13. std_logic_vector VS unsigned

    Started by knip, March 2nd, 2013 12:42 PM
    • Replies: 6
    • Views: 32,201
    March 3rd, 2013, 02:30 AM Go to last post
  14. Using SEARCH_PATH with VHDL libraries?

    Started by jekulp, March 2nd, 2013 12:57 PM
    library, search_path
    • Replies: 1
    • Views: 29,497
    March 3rd, 2013, 12:20 AM Go to last post
  15. transmission video over ip

    Started by zayneb, February 28th, 2013 11:04 AM
    • Replies: 1
    • Views: 29,412
    March 1st, 2013, 12:10 AM Go to last post
  16. New to VHDL. . . and this error is adding years to my life!

    Started by deftonesrc, February 27th, 2013 11:27 AM
    • Replies: 5
    • Views: 32,810
    February 28th, 2013, 01:12 AM Go to last post
  17. interfacing dac5662 to the vertex-5

    Started by aishwarya, February 13th, 2013 03:39 AM
    • Replies: 4
    • Views: 30,385
    February 27th, 2013, 03:44 AM Go to last post
  18. Question THDB-ADA pin assgnments for DE2-115

    Started by duytan411, February 25th, 2013 12:49 AM
    • Replies: 2
    • Views: 31,583
    February 25th, 2013, 07:17 PM Go to last post
  19. Question component alt_dspbuilder_DFFEALTR

    Started by Stepi, February 25th, 2013 01:18 PM
    • Replies: 0
    • Views: 27,734
    February 25th, 2013, 01:18 PM Go to last post
  20. vhdl for reading pwm

    Started by faizul hassan, February 8th, 2013 03:56 PM
    • Replies: 5
    • Views: 29,245
    February 25th, 2013, 08:01 AM Go to last post
  21. help for vhdl processing image

    Started by khama, February 22nd, 2013 11:58 AM
    • Replies: 4
    • Views: 28,747
    February 23rd, 2013, 08:03 AM Go to last post
  22. Best way to code a clock divider?

    Started by dams0622, February 22nd, 2013 07:35 AM
    • Replies: 5
    • Views: 29,121
    February 23rd, 2013, 03:52 AM Go to last post
  23. Three Port Register File

    Started by irontitan76, February 20th, 2013 11:29 AM
    • Replies: 3
    • Views: 30,446
    February 22nd, 2013, 12:12 AM Go to last post
  24. zero all elements in an array

    Started by martinwoc, February 20th, 2013 11:58 PM
    • Replies: 6
    • Views: 32,304
    February 21st, 2013, 06:43 AM Go to last post
  25. error with using a macro

    Started by martinwoc, February 21st, 2013 12:50 AM
    • Replies: 5
    • Views: 31,890
    February 21st, 2013, 04:41 AM Go to last post
  26. State Machine - CASE\WHEN and glitches

    Started by blaine1984, February 19th, 2013 01:54 PM
    • Replies: 4
    • Views: 30,332
    February 20th, 2013, 02:36 AM Go to last post
  27. Exclamation VHDL Syntax Questions - State Machine

    Started by bsmith93, February 11th, 2013 02:08 PM
    • Replies: 4
    • Views: 29,888
    February 18th, 2013, 03:36 AM Go to last post
  28. Initialize signal with random number

    Started by mwb500, February 12th, 2013 09:36 AM
    • Replies: 2
    • Views: 27,701
    February 13th, 2013, 03:38 AM Go to last post
  29. ckeck clock existent

    Started by yafpga, February 11th, 2013 12:13 AM
    • Replies: 2
    • Views: 27,421
    February 13th, 2013, 03:28 AM Go to last post

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