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Forum: SoC Discussion

A place to discuss topics related to Altera's SoC products and software for them

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  1. Discussion of all the SoC devices including FPGA and HPS interaction

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    • Threads: 515
    • Posts: 1,946
  2. A discussion on the Linux operating system for SoC devices

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    • Threads: 214
    • Posts: 564
  3. Links and forums for non-Linux operating systems that support Altera's SoC devices.

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    • Threads: 16
    • Posts: 44

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  4. A place to discuss the hardware libraries of the SoC devices. The hardware libraries consist of the SoC abstraction layer and hardware manager.

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    Forum Statistics:

    • Threads: 71
    • Posts: 250
  5. A place to discuss booting SoC devices and the bootloader that makes this happen

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    Forum Statistics:

    • Threads: 86
    • Posts: 332
  1. Sticky Thread Sticky: Readme!

    Started by BadOmen, January 27th, 2015 12:29 PM
    • Replies: 0
    • Views: 10,482
    January 27th, 2015, 12:29 PM Go to last post
    • Replies: 1
    • Views: 1,510
    May 10th, 2017, 08:46 PM Go to last post
    • Replies: 0
    • Views: 774
    May 9th, 2017, 12:54 PM Go to last post
  1. F2H_SDRAM "WAITREQUEST" doesn't return to '0'

    Started by shaiko, May 7th, 2017 12:00 PM
    • Replies: 0
    • Views: 800
    May 7th, 2017, 12:00 PM Go to last post
  2. got this error when using eclipse

    Started by bittersweet, April 24th, 2017 04:06 AM
    2 Pages
    1 2
    • Replies: 18
    • Views: 3,657
    May 2nd, 2017, 10:34 PM Go to last post
    • Replies: 0
    • Views: 1,211
    April 28th, 2017, 05:51 PM Go to last post
  3. Unable to read/write data on h2f_axi_master port

    Started by dpt_vkt, April 13th, 2017 03:22 AM
    • Replies: 1
    • Views: 1,325
    April 28th, 2017, 04:14 AM Go to last post
  4. the statement in console tab

    Started by bittersweet, April 28th, 2017 02:39 AM
    • Replies: 1
    • Views: 950
    April 28th, 2017, 03:43 AM Go to last post
  5. how to link the file to the SDRAM in qsys tools

    Started by bittersweet, April 20th, 2017 06:40 AM
    • Replies: 2
    • Views: 1,242
    April 23rd, 2017, 05:54 AM Go to last post
    • Replies: 3
    • Views: 1,843
    April 23rd, 2017, 04:27 AM Go to last post
  6. Question "Taking the SDRAM bridge out of reset"

    Started by ROBINKERSTENS92, March 29th, 2017 04:10 AM
    de0, fpga-hps, nano-soc, reset, sdram
    • Replies: 1
    • Views: 1,581
    April 22nd, 2017, 02:44 PM Go to last post
  7. Question mSGDMA ST-MM to SDRAM - Issue

    Started by marciomoura, March 1st, 2017 02:24 PM
    2 Pages
    1 2
    • Replies: 13
    • Views: 3,522
    April 20th, 2017, 12:32 AM Go to last post
    • Replies: 0
    • Views: 1,249
    April 17th, 2017, 06:03 PM Go to last post
  8. Making Qsys Master Component

    Started by mtmd, December 28th, 2015 12:21 AM
    • Replies: 8
    • Views: 4,380
    April 14th, 2017, 02:44 PM Go to last post
  9. Question Beginner question regarding HPS, Qsys and NIOSII

    Started by ROBINKERSTENS92, April 14th, 2017 06:13 AM
    h2f_axi, hal, hps, nios ii, sgdma
    • Replies: 0
    • Views: 1,044
    April 14th, 2017, 06:13 AM Go to last post
  10. HPS GPIO's ouputs stuck in high impedence?

    Started by KIO, December 14th, 2016 02:44 AM
    4 Pages
    1 2 3 ... 4
    • Replies: 31
    • Views: 5,441
    April 14th, 2017, 03:48 AM Go to last post
    • Replies: 0
    • Views: 1,012
    April 12th, 2017, 01:52 PM Go to last post
  11. HPS load hangs after RBF is loaded

    Started by shaiko, April 4th, 2017 02:50 PM
    • Replies: 5
    • Views: 1,723
    April 12th, 2017, 03:06 AM Go to last post
  12. GPIO access using Qsys tool and Linux in deo nano

    Started by sravich81, April 11th, 2017 10:13 AM
    • Replies: 0
    • Views: 983
    April 11th, 2017, 10:13 AM Go to last post
  13. Building a custom kernel for the DE1-SoC...

    Started by EauContraire, March 29th, 2017 05:29 AM
    • Replies: 6
    • Views: 2,180
    April 5th, 2017, 05:10 AM Go to last post
  14. Linux PTP IEEE 1588

    Started by chethan.g, August 9th, 2016 11:34 PM
    • Replies: 2
    • Views: 2,617
    April 4th, 2017, 11:35 AM Go to last post
  15. Cyclone V SOC ARM DMA

    Started by shaiko, March 20th, 2017 04:12 AM
    • Replies: 3
    • Views: 1,732
    April 2nd, 2017, 06:34 PM Go to last post
  16. Custom accelerator circuit design with DMA

    Started by slh47, December 22nd, 2016 03:43 AM
    • Replies: 2
    • Views: 1,610
    March 31st, 2017, 07:39 AM Go to last post
  17. Can I connect USB to logic part on Altera SoC's

    Started by eneserdin, March 30th, 2017 10:09 AM
    • Replies: 2
    • Views: 1,281
    March 31st, 2017, 07:32 AM Go to last post
  18. Question Using FPGA to HPS-Bridge

    Started by Anthrados, March 26th, 2017 11:32 AM
    • Replies: 2
    • Views: 1,461
    March 27th, 2017, 12:11 AM Go to last post
  19. Ethernet to UART Converter NIOS - HAL or MicroC?

    Started by mhathaway, March 23rd, 2017 09:01 AM
    ethernet, microc/osii, nios, tse, uart
    • Replies: 0
    • Views: 1,224
    March 23rd, 2017, 09:01 AM Go to last post
  20. Arria 10 Ethernet Connection Issue

    Started by Bogg, March 22nd, 2017 10:41 AM
    arria 10, ethernet
    • Replies: 0
    • Views: 1,159
    March 22nd, 2017, 10:41 AM Go to last post
    • Replies: 0
    • Views: 1,252
    March 9th, 2017, 01:41 PM Go to last post
    • Replies: 1
    • Views: 1,219
    February 27th, 2017, 01:11 PM Go to last post
  21. HPS to FPGA AXI LITE clock crossing brige timeout

    Started by shaiko, January 16th, 2017 08:46 AM
    • Replies: 1
    • Views: 1,199
    February 21st, 2017, 03:00 PM Go to last post
  22. QuadSPI interface initialization

    Started by yeves, February 15th, 2017 09:27 PM
    nios, qsys, quadspi
    • Replies: 1
    • Views: 1,365
    February 17th, 2017, 04:45 AM Go to last post

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