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Forum: SoC Discussion

A place to discuss topics related to Altera's SoC products and software for them

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  1. Discussion of all the SoC devices including FPGA and HPS interaction

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    • Threads: 501
    • Posts: 1,902
  2. A discussion on the Linux operating system for SoC devices

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    • Threads: 199
    • Posts: 533

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  3. Links and forums for non-Linux operating systems that support Altera's SoC devices.

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    • Threads: 15
    • Posts: 42
  4. A place to discuss the hardware libraries of the SoC devices. The hardware libraries consist of the SoC abstraction layer and hardware manager.

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    Forum Statistics:

    • Threads: 68
    • Posts: 240
  5. A place to discuss booting SoC devices and the bootloader that makes this happen

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    Forum Statistics:

    • Threads: 76
    • Posts: 301
  1. Sticky Thread Sticky: Readme!

    Started by BadOmen, January 27th, 2015 11:29 AM
    • Replies: 0
    • Views: 9,999
    January 27th, 2015, 11:29 AM Go to last post
  1. arria 10 jtag problem while using ds5

    Started by hl8316, Today 06:30 PM
    • Replies: 0
    • Views: 14
    Today, 06:30 PM Go to last post
  2. Uart Baud Rate Drop

    Started by stefanri, August 17th, 2017 07:09 AM
    • Replies: 4
    • Views: 168
    Yesterday, 09:32 AM Go to last post
  3. SPI communication

    Started by seongjinkim, Yesterday 03:42 AM
    • Replies: 0
    • Views: 47
    Yesterday, 03:42 AM Go to last post
  4. Altera avalon I2C

    Started by kgandhi0408, August 18th, 2017 03:39 AM
    • Replies: 1
    • Views: 118
    August 18th, 2017, 09:03 PM Go to last post
  5. Fixed-link Feature

    Started by MartinFeng_Cytech, August 17th, 2017 12:23 AM
    • Replies: 0
    • Views: 95
    August 17th, 2017, 12:23 AM Go to last post
  6. Qsys Custom component Error

    Started by Marco Lobba, August 8th, 2017 07:29 AM
    • Replies: 2
    • Views: 311
    August 8th, 2017, 10:29 PM Go to last post
  7. Questions about SOC FPGA Preloader and device tree

    Started by OmranAbazid, May 23rd, 2017 02:40 PM
    • Replies: 9
    • Views: 1,297
    August 1st, 2017, 12:28 AM Go to last post
  8. Qsys Custom Peripheral Memory Mapping

    Started by FlipFlop, July 26th, 2017 08:53 PM
    custom peripheral, interrupt, nios, qsys
    • Replies: 2
    • Views: 349
    July 28th, 2017, 12:59 PM Go to last post
  9. Soc simulation in VHDL

    Started by romainht, July 27th, 2017 11:10 PM
    modelsim, vhdl
    • Replies: 2
    • Views: 329
    July 28th, 2017, 01:38 AM Go to last post
  10. Datails about DK-START-5AGXB3N

    Started by Pierre9258, July 26th, 2017 11:25 PM
    • Replies: 3
    • Views: 346
    July 28th, 2017, 01:13 AM Go to last post
  11. About USB memory

    Started by hwada, July 26th, 2017 05:49 PM
    • Replies: 0
    • Views: 247
    July 26th, 2017, 05:49 PM Go to last post
  12. Programming Cyclone V SoC FPGA from or preloader

    Started by Sam16, July 26th, 2017 05:33 AM
    arm, cyclone v, hps, soc
    • Replies: 1
    • Views: 262
    July 26th, 2017, 08:54 AM Go to last post
  13. Cyclone V SOC 256 bit F2S

    Started by shaiko, April 26th, 2017 01:13 PM
    • Replies: 7
    • Views: 1,645
    July 26th, 2017, 08:29 AM Go to last post
  14. Number of FPGA cores used in design

    Started by umutulutas, July 23rd, 2017 10:45 PM
    • Replies: 1
    • Views: 304
    July 24th, 2017, 11:58 AM Go to last post
    • Replies: 9
    • Views: 1,605
    July 20th, 2017, 08:29 AM Go to last post
  15. Getting access to HPS GPIO lines

    Started by rod@ariradesign.com, July 17th, 2017 04:02 PM
    • Replies: 3
    • Views: 394
    July 18th, 2017, 03:32 PM Go to last post
  16. RTL2832U Linux driver compilation on ARM

    Started by kaminari0x01, July 13th, 2017 03:29 PM
    • Replies: 0
    • Views: 259
    July 13th, 2017, 03:29 PM Go to last post
  17. Routing HPS gpio to an LED in FPGA region

    Started by bgh, July 11th, 2017 10:55 PM
    • Replies: 5
    • Views: 481
    July 12th, 2017, 03:59 AM Go to last post
    • Replies: 0
    • Views: 270
    July 11th, 2017, 12:22 PM Go to last post
  18. How to make sure SDRAM write transaction is finished?

    Started by sonycman, July 6th, 2017 01:18 AM
    acknowledge, memory, sdram, write
    • Replies: 0
    • Views: 308
    July 6th, 2017, 01:18 AM Go to last post
  19. DE1-SoC MSEL [00000] or [01110] Unable to program FPGA from HPS

    Started by horia, January 22nd, 2016 11:52 PM
    cyclonev, de1-soc, msel, sockit
    • Replies: 3
    • Views: 2,183
    July 4th, 2017, 01:06 PM Go to last post
  20. terasic / Atlas-SoC Kit and Altera OpenCL compatibility

    Started by ivanfig1, June 24th, 2016 12:54 PM
    atlas-soc, opencl
    • Replies: 6
    • Views: 1,592
    July 3rd, 2017, 03:23 AM Go to last post
  21. Using the VGA-Adapter with Terasic DE1-SoC

    Started by TADRIAN, June 27th, 2017 12:00 AM
    cga
    • Replies: 0
    • Views: 384
    June 27th, 2017, 12:00 AM Go to last post
    • Replies: 1
    • Views: 468
    June 24th, 2017, 06:29 PM Go to last post
  22. quartus ii 17.0 download firmware failed

    Started by merciyy, June 22nd, 2017 04:20 PM
    • Replies: 2
    • Views: 582
    June 23rd, 2017, 10:13 AM Go to last post
    • Replies: 1
    • Views: 388
    June 23rd, 2017, 07:46 AM Go to last post
  23. Trouble with setting up Ethernet

    Started by tyrannicrex, June 23rd, 2017 01:28 AM
    • Replies: 0
    • Views: 331
    June 23rd, 2017, 01:28 AM Go to last post
  24. Nios II/f and DDR4 memory with Arria 10 dev board

    Started by arlinpierce, June 20th, 2017 08:21 AM
    arria10, ddr4, niosii
    • Replies: 2
    • Views: 538
    June 22nd, 2017, 10:11 AM Go to last post
  25. Cyclone V sdcard pull-up

    Started by CV_HAAN, June 20th, 2017 10:14 PM
    • Replies: 2
    • Views: 537
    June 21st, 2017, 12:32 AM Go to last post
  26. HPS Peripheral pins assignment.

    Started by kgandhi0408, June 13th, 2017 05:15 AM
    • Replies: 3
    • Views: 734
    June 20th, 2017, 12:24 AM Go to last post

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