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Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 03:36 PM
    • Replies: 0
    • Views: 14,592
    October 14th, 2014, 03:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 02:37 PM
    • Replies: 0
    • Views: 33,613
    July 19th, 2013, 02:37 PM Go to last post
  1. FPGA-to-HPS SDRAM Interface blocks whole HPS

    Started by herrhannes, March 17th, 2014 12:02 AM
    2 Pages
    1 2
    • Replies: 12
    • Views: 22,933
    November 27th, 2014, 02:18 PM Go to last post
  2. Writing to HPS-DDR3 memory

    Started by vidyagovindan, November 25th, 2014 09:17 PM
    cyclone v, hps ddr3, soc
    • Replies: 2
    • Views: 10,094
    November 26th, 2014, 10:51 PM Go to last post
  3. Can not ping to the host

    Started by lenkalenken, June 2nd, 2014 11:48 PM
    • Replies: 7
    • Views: 17,843
    November 24th, 2014, 06:17 PM Go to last post
    • Replies: 3
    • Views: 13,579
    November 14th, 2014, 05:09 AM Go to last post
  4. Cyclone V SoC Rootport with MSI Ref Sys limitations

    Started by Mounir, November 7th, 2014 05:27 AM
    • Replies: 0
    • Views: 9,884
    November 7th, 2014, 05:27 AM Go to last post
    • Replies: 6
    • Views: 15,275
    November 5th, 2014, 05:45 PM Go to last post
  5. cyclone V FPGA: h2f bridge addressing

    Started by FABELTiER, November 5th, 2014 01:15 PM
    • Replies: 1
    • Views: 12,709
    November 5th, 2014, 05:35 PM Go to last post
  6. RTL2838 device driver?

    Started by petter, November 4th, 2014 11:10 AM
    • Replies: 0
    • Views: 9,617
    November 4th, 2014, 11:10 AM Go to last post
  7. Quartus II tools for SoC FPGAs

    Started by FABELTiER, November 2nd, 2014 03:01 AM
    • Replies: 1
    • Views: 9,869
    November 2nd, 2014, 06:18 AM Go to last post
  8. Cyclone V: FPGA and HPS in JTAG chain - SFL loader error

    Started by sast, October 19th, 2014 11:21 PM
    • Replies: 0
    • Views: 11,059
    October 19th, 2014, 11:21 PM Go to last post
  9. Cyclone V DE1-SoC error message

    Started by vitaliipa, October 17th, 2014 07:28 AM
    • Replies: 0
    • Views: 11,053
    October 17th, 2014, 07:28 AM Go to last post
  10. Hard emi, Cyclone V SX, max speed

    Started by asion, October 12th, 2014 09:38 AM
    • Replies: 0
    • Views: 11,860
    October 12th, 2014, 09:38 AM Go to last post
  11. Fail to access SDRAM above 1MB

    Started by gxk, October 5th, 2014 03:15 AM
    • Replies: 1
    • Views: 12,439
    October 7th, 2014, 08:03 AM Go to last post
    • Replies: 1
    • Views: 15,407
    October 2nd, 2014, 12:18 AM Go to last post
  12. FPGA-to-HPS SDRAM vs. HPS-to-FPGA

    Started by christnp, August 26th, 2014 07:15 AM
    2 Pages
    1 2
    fgpa-to-hps, hps-to-fpga, sdram, video processing
    • Replies: 10
    • Views: 23,201
    September 30th, 2014, 04:52 AM Go to last post
  13. Question Help required! Baremetal application with custom Preloader

    Started by MrFreshman, September 17th, 2014 04:11 AM
    2 Pages
    1 2
    baremetal, hps, qspi, soc
    • Replies: 10
    • Views: 23,595
    September 24th, 2014, 10:27 PM Go to last post
  14. Arria v SoC FPGA frequency

    Started by vgokhale, April 11th, 2014 12:37 PM
    • Replies: 3
    • Views: 19,545
    September 23rd, 2014, 12:43 PM Go to last post
  15. SoC Simulation via AXI BFMs

    Started by dwh@ovro.caltech.edu, September 23rd, 2014 12:27 PM
    • Replies: 0
    • Views: 11,848
    September 23rd, 2014, 12:27 PM Go to last post
  16. HPS-to-FPGA Interrupts

    Started by jhelekor, September 22nd, 2014 04:23 AM
    • Replies: 4
    • Views: 13,970
    September 23rd, 2014, 12:38 AM Go to last post
  17. logic element difference between Cyclone V SX C5 and C6

    Started by martinwalter, September 22nd, 2014 05:42 AM
    chip planner, cyclone v, logic element, quartus, soc
    • Replies: 0
    • Views: 13,100
    September 22nd, 2014, 05:42 AM Go to last post
  18. Post Slow frame rate with D5M and DE1-SoC

    Started by mderryberry, September 17th, 2014 06:12 PM
    d5m, de1-soc, frame rate
    • Replies: 3
    • Views: 14,227
    September 21st, 2014, 10:06 PM Go to last post
    • Replies: 2
    • Views: 15,168
    September 18th, 2014, 07:08 AM Go to last post
  19. lightweight bridge address for DE1-SoC board

    Started by FABELTiER, September 12th, 2014 01:39 AM
    • Replies: 2
    • Views: 14,963
    September 18th, 2014, 12:27 AM Go to last post
  20. Cyclone V QSPI flash controller slaves

    Started by elenuccik, September 16th, 2014 06:26 AM
    qspi, qspi slaves
    • Replies: 5
    • Views: 16,019
    September 17th, 2014, 04:50 AM Go to last post
  21. Any dev boards available based on the Aria 10 SoC yet?

    Started by azafar, September 11th, 2014 12:01 PM
    aria 10 soc, development board
    • Replies: 1
    • Views: 13,070
    September 12th, 2014, 10:32 AM Go to last post
  22. using an SPI flash for Cyclone V HPS

    Started by elenuccik, September 9th, 2014 04:38 AM
    flash programming, hps, spi flash
    • Replies: 1
    • Views: 13,709
    September 11th, 2014, 03:04 AM Go to last post
  23. TrustZone prevents access to CoreSight

    Started by Steve Haynal, July 23rd, 2014 03:20 PM
    • Replies: 1
    • Views: 14,876
    September 10th, 2014, 08:33 PM Go to last post
  24. Qsys can't find hps pin info

    Started by seanmcd, August 29th, 2014 04:47 PM
    • Replies: 3
    • Views: 14,990
    September 8th, 2014, 04:14 PM Go to last post
  25. Implementing custom DDR controller in Cyclone SOC

    Started by gplhegde, September 2nd, 2014 10:16 PM
    • Replies: 8
    • Views: 15,939
    September 8th, 2014, 03:54 PM Go to last post
  26. FPGA to HPS SDRAM Interface

    Started by Thomas Reinemann, November 29th, 2013 12:12 AM
    • Replies: 6
    • Views: 28,823
    September 8th, 2014, 03:42 AM Go to last post

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