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Threads 451 to 478 of 478

Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 04:36 PM
    • Replies: 0
    • Views: 11,577
    October 14th, 2014, 04:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 03:37 PM
    • Replies: 0
    • Views: 30,783
    July 19th, 2013, 03:37 PM Go to last post
  1. Using Fpga to HPS bridge

    Started by subhan401, November 17th, 2013 10:05 PM
    • Replies: 2
    • Views: 23,481
    November 20th, 2013, 10:16 PM Go to last post
  2. Post SoCKit HSMC SATA Compatibility

    Started by LIGHTHOUSEGRIFFIN, October 11th, 2013 07:05 AM
    sata sockit
    • Replies: 1
    • Views: 29,462
    November 15th, 2013, 09:31 AM Go to last post
  3. Post Cyclone V Soc Sample Code

    Started by sktarun, November 11th, 2013 07:34 AM
    altera cyclone v soc kit, fpga, hps
    • Replies: 1
    • Views: 24,487
    November 13th, 2013, 10:07 PM Go to last post
  4. Unhappy Problem when download FPGA SRAM OBJECTIVE FILE.

    Started by tofuhunter, November 6th, 2013 02:01 AM
    • Replies: 2
    • Views: 24,763
    November 13th, 2013, 10:04 PM Go to last post
  5. HPS frequency

    Started by Tst, November 4th, 2013 02:20 AM
    • Replies: 0
    • Views: 21,766
    November 4th, 2013, 02:20 AM Go to last post
  6. DMA interrupts in HPS: how to?

    Started by Tst, October 16th, 2013 10:44 AM
    dma, hps, interrupts
    • Replies: 1
    • Views: 24,526
    October 29th, 2013, 09:17 AM Go to last post
  7. Quartus Web Edition and Altera IP

    Started by tcpluess, October 22nd, 2013 01:47 PM
    • Replies: 1
    • Views: 22,806
    October 24th, 2013, 05:52 AM Go to last post
  8. using axi bridge

    Started by stxo6410, October 23rd, 2013 10:56 AM
    • Replies: 0
    • Views: 22,936
    October 23rd, 2013, 10:56 AM Go to last post
  9. Error 129001 Compiling HPS Component

    Started by sbssdh, October 17th, 2013 11:51 PM
    • Replies: 0
    • Views: 24,377
    October 17th, 2013, 11:51 PM Go to last post
    • Replies: 0
    • Views: 23,944
    October 17th, 2013, 04:58 PM Go to last post
  10. Dual rank DDR3 device

    Started by leo_bloom, October 15th, 2013 01:53 AM
    ddr3, dual rank, hmc
    • Replies: 2
    • Views: 25,111
    October 17th, 2013, 01:00 AM Go to last post
  11. Help needed in selection of FPGA for WLAN design

    Started by WaiSiangYeoh, October 15th, 2013 08:26 PM
    • Replies: 1
    • Views: 23,702
    October 16th, 2013, 05:40 AM Go to last post
    • Replies: 0
    • Views: 23,906
    October 15th, 2013, 06:27 AM Go to last post
  12. Full rate PHY selection

    Started by sabat, October 2nd, 2013 01:39 PM
    • Replies: 3
    • Views: 25,321
    October 10th, 2013, 09:06 AM Go to last post
  13. Two Independent Ethernet MAC on Cyclone V SoC?

    Started by smallfire, October 9th, 2013 01:43 PM
    cyclonev soc, ethernet
    • Replies: 0
    • Views: 22,845
    October 9th, 2013, 01:43 PM Go to last post
  14. Cyclone V HSMC Lvds differential pairs direction

    Started by mogmogmogmog, October 2nd, 2013 01:06 PM
    lvds hsmc differential
    • Replies: 3
    • Views: 25,329
    October 3rd, 2013, 03:34 PM Go to last post
  15. how can I use HSP GPIO interrupt

    Started by mattew_wang, September 25th, 2013 03:14 AM
    • Replies: 2
    • Views: 24,756
    September 25th, 2013, 08:51 PM Go to last post
  16. Lightbulb An all-in-one Software Defined Radio platform

    Started by leshumphris, September 15th, 2013 09:54 PM
    2 Pages
    1 2
    beradio, cyclone 4, software defined radio
    • Replies: 16
    • Views: 31,431
    September 24th, 2013, 08:49 AM Go to last post
  17. Cyclone V SoC AHB BUS

    Started by fberndl, August 19th, 2013 06:56 AM
    • Replies: 4
    • Views: 29,258
    September 9th, 2013, 09:49 AM Go to last post
  18. FPGA Hard Memory Controller

    Started by DaveHorne, August 29th, 2013 07:44 AM
    • Replies: 3
    • Views: 26,823
    September 4th, 2013, 11:46 AM Go to last post
  19. FPGA2SDRAM Address Space Size

    Started by kstolp, August 15th, 2013 12:29 PM
    • Replies: 4
    • Views: 28,289
    August 27th, 2013, 02:36 PM Go to last post
  20. Quartus SoC Compiler Warnings

    Started by kstolp, August 8th, 2013 04:30 PM
    • Replies: 7
    • Views: 28,811
    August 15th, 2013, 03:53 PM Go to last post
  21. Altera / Softing EtherCAT solution

    Started by Jenson, August 12th, 2013 03:00 AM
    • Replies: 0
    • Views: 27,577
    August 12th, 2013, 03:00 AM Go to last post
  22. Pain or no pain with Cyclone V Integrated ARM?

    Started by joe306, August 7th, 2013 03:00 PM
    • Replies: 1
    • Views: 26,607
    August 8th, 2013, 10:51 AM Go to last post
  23. USB port unexpected disabled for Altera Cyclone V

    Started by ljg6, July 22nd, 2013 07:47 PM
    usb cyclone v soc
    • Replies: 3
    • Views: 28,606
    July 24th, 2013, 09:20 AM Go to last post
  24. USB DMA transfter stopped for Altera Cyclone V.

    Started by ljg6, July 22nd, 2013 07:45 PM
    usb cyclone v soc
    • Replies: 1
    • Views: 29,889
    July 23rd, 2013, 11:33 AM Go to last post
  25. How can i check the arm frequency inside the cyclone V?

    Started by aprado, July 22nd, 2013 11:50 AM
    • Replies: 1
    • Views: 28,154
    July 22nd, 2013, 01:11 PM Go to last post
  26. Altera SoC: What is "Peripheral FPGA Clocks" for?

    Started by hanel, July 6th, 2013 04:52 AM
    • Replies: 2
    • Views: 29,873
    July 18th, 2013, 09:34 AM Go to last post

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