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Threads 451 to 480 of 488

Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 03:36 PM
    • Replies: 0
    • Views: 11,850
    October 14th, 2014, 03:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 02:37 PM
    • Replies: 0
    • Views: 31,060
    July 19th, 2013, 02:37 PM Go to last post
  1. steps required to get a tcp/ip stack running on hps

    Started by 56kuser, December 19th, 2013 02:41 AM
    • Replies: 0
    • Views: 18,929
    December 19th, 2013, 02:41 AM Go to last post
  2. HPS clock peripherals, specifically CAN

    Started by Doug, September 4th, 2013 10:16 AM
    • Replies: 6
    • Views: 27,632
    December 18th, 2013, 11:19 PM Go to last post
  3. Cyclone III BGA Stencil

    Started by RelayNetworks, December 17th, 2013 11:20 AM
    • Replies: 0
    • Views: 19,936
    December 17th, 2013, 11:20 AM Go to last post
  4. hps in qsys

    Started by asion, December 11th, 2013 08:21 PM
    hpq, qsys
    • Replies: 0
    • Views: 21,994
    December 11th, 2013, 08:21 PM Go to last post
  5. Lightbulb usb camera can not capture 640*480 image

    Started by xswyzao, December 11th, 2013 12:11 AM
    usb camera
    • Replies: 0
    • Views: 21,556
    December 11th, 2013, 12:11 AM Go to last post
    • Replies: 2
    • Views: 22,754
    December 3rd, 2013, 07:14 AM Go to last post
  6. How to load FPGA from sd card without MAX_LED on?

    Started by john.kading, December 2nd, 2013 06:57 AM
    • Replies: 0
    • Views: 20,841
    December 2nd, 2013, 06:57 AM Go to last post
  7. HSMC loopback adapter makes JTAG unusable

    Started by herrhannes, November 24th, 2013 09:53 PM
    • Replies: 5
    • Views: 22,819
    December 2nd, 2013, 01:10 AM Go to last post
  8. stmmac_dvr_probe: warning: cannot get CSR clock

    Started by yehudaot, November 28th, 2013 01:32 AM
    • Replies: 0
    • Views: 22,321
    November 28th, 2013, 01:32 AM Go to last post
    • Replies: 0
    • Views: 21,778
    November 26th, 2013, 12:03 AM Go to last post
  9. Using Fpga to HPS bridge

    Started by subhan401, November 17th, 2013 09:05 PM
    • Replies: 2
    • Views: 23,607
    November 20th, 2013, 09:16 PM Go to last post
  10. Post SoCKit HSMC SATA Compatibility

    Started by LIGHTHOUSEGRIFFIN, October 11th, 2013 06:05 AM
    sata sockit
    • Replies: 1
    • Views: 29,541
    November 15th, 2013, 08:31 AM Go to last post
  11. Post Cyclone V Soc Sample Code

    Started by sktarun, November 11th, 2013 06:34 AM
    altera cyclone v soc kit, fpga, hps
    • Replies: 1
    • Views: 24,638
    November 13th, 2013, 09:07 PM Go to last post
  12. Unhappy Problem when download FPGA SRAM OBJECTIVE FILE.

    Started by tofuhunter, November 6th, 2013 01:01 AM
    • Replies: 2
    • Views: 24,878
    November 13th, 2013, 09:04 PM Go to last post
  13. HPS frequency

    Started by Tst, November 4th, 2013 01:20 AM
    • Replies: 0
    • Views: 21,818
    November 4th, 2013, 01:20 AM Go to last post
  14. DMA interrupts in HPS: how to?

    Started by Tst, October 16th, 2013 09:44 AM
    dma, hps, interrupts
    • Replies: 1
    • Views: 24,632
    October 29th, 2013, 08:17 AM Go to last post
  15. Quartus Web Edition and Altera IP

    Started by tcpluess, October 22nd, 2013 12:47 PM
    • Replies: 1
    • Views: 22,885
    October 24th, 2013, 04:52 AM Go to last post
  16. using axi bridge

    Started by stxo6410, October 23rd, 2013 09:56 AM
    • Replies: 0
    • Views: 23,010
    October 23rd, 2013, 09:56 AM Go to last post
  17. Error 129001 Compiling HPS Component

    Started by sbssdh, October 17th, 2013 10:51 PM
    • Replies: 0
    • Views: 24,449
    October 17th, 2013, 10:51 PM Go to last post
    • Replies: 0
    • Views: 24,022
    October 17th, 2013, 03:58 PM Go to last post
  18. Dual rank DDR3 device

    Started by leo_bloom, October 15th, 2013 12:53 AM
    ddr3, dual rank, hmc
    • Replies: 2
    • Views: 25,212
    October 17th, 2013, 12:00 AM Go to last post
  19. Help needed in selection of FPGA for WLAN design

    Started by WaiSiangYeoh, October 15th, 2013 07:26 PM
    • Replies: 1
    • Views: 23,791
    October 16th, 2013, 04:40 AM Go to last post
    • Replies: 0
    • Views: 23,944
    October 15th, 2013, 05:27 AM Go to last post
  20. Full rate PHY selection

    Started by sabat, October 2nd, 2013 12:39 PM
    • Replies: 3
    • Views: 25,406
    October 10th, 2013, 08:06 AM Go to last post
  21. Two Independent Ethernet MAC on Cyclone V SoC?

    Started by smallfire, October 9th, 2013 12:43 PM
    cyclonev soc, ethernet
    • Replies: 0
    • Views: 22,899
    October 9th, 2013, 12:43 PM Go to last post
  22. Cyclone V HSMC Lvds differential pairs direction

    Started by mogmogmogmog, October 2nd, 2013 12:06 PM
    lvds hsmc differential
    • Replies: 3
    • Views: 25,489
    October 3rd, 2013, 02:34 PM Go to last post
  23. how can I use HSP GPIO interrupt

    Started by mattew_wang, September 25th, 2013 02:14 AM
    • Replies: 2
    • Views: 24,918
    September 25th, 2013, 07:51 PM Go to last post
  24. Lightbulb An all-in-one Software Defined Radio platform

    Started by leshumphris, September 15th, 2013 08:54 PM
    2 Pages
    1 2
    beradio, cyclone 4, software defined radio
    • Replies: 16
    • Views: 31,740
    September 24th, 2013, 07:49 AM Go to last post
  25. Cyclone V SoC AHB BUS

    Started by fberndl, August 19th, 2013 05:56 AM
    • Replies: 4
    • Views: 29,438
    September 9th, 2013, 08:49 AM Go to last post
  26. FPGA Hard Memory Controller

    Started by DaveHorne, August 29th, 2013 06:44 AM
    • Replies: 3
    • Views: 26,981
    September 4th, 2013, 10:46 AM Go to last post

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