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Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 03:36 PM
    • Replies: 0
    • Views: 12,545
    October 14th, 2014, 03:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 02:37 PM
    • Replies: 0
    • Views: 31,711
    July 19th, 2013, 02:37 PM Go to last post
  1. Cyclone V Soc Development kit UART signal on GPIO pins

    Started by Amna Tehreem, February 1st, 2017 11:49 PM
    • Replies: 1
    • Views: 1,178
    February 3rd, 2017, 07:02 PM Go to last post
  2. DE1-SOC 5CSEMA5F31C6 can't be detected

    Started by ujjwalaltera, January 23rd, 2017 04:38 PM
    • Replies: 8
    • Views: 1,944
    January 31st, 2017, 10:49 PM Go to last post
  3. Reading from a FIFO with DMA

    Started by pietro_carra, January 26th, 2017 07:42 AM
    • Replies: 0
    • Views: 942
    January 26th, 2017, 07:42 AM Go to last post
    • Replies: 2
    • Views: 1,309
    January 23rd, 2017, 07:46 AM Go to last post
  4. Question How to configure the SPI on DE0-Nano-SoC

    Started by m3!_newbie, January 15th, 2017 11:07 AM
    arm, de0-nano-soc, hps, spi, touchscreen
    • Replies: 1
    • Views: 1,514
    January 19th, 2017, 01:11 PM Go to last post
  5. Cyclone V SE Power management

    Started by nico94, January 13th, 2017 12:58 AM
    • Replies: 1
    • Views: 2,699
    January 17th, 2017, 09:16 PM Go to last post
  6. Cyclone V, DE1-SOC GPIO Header Pinout Diagram

    Started by sherrellbc, September 30th, 2014 08:40 PM
    • Replies: 4
    • Views: 15,657
    January 12th, 2017, 12:41 PM Go to last post
  7. Changing the HPS SDRAM PLL clock source from QSys

    Started by Daixiwen, January 11th, 2017 04:36 AM
    • Replies: 3
    • Views: 1,315
    January 12th, 2017, 12:33 AM Go to last post
  8. Help how to use avalon interface

    Started by gianluca87, January 10th, 2017 08:08 AM
    avalon, fpga, hps, soc
    • Replies: 3
    • Views: 1,311
    January 12th, 2017, 12:19 AM Go to last post
    • Replies: 1
    • Views: 986
    January 11th, 2017, 11:35 AM Go to last post
  9. cpu0_deflags4 interrupt

    Started by wieant, January 4th, 2017 04:59 AM
    • Replies: 0
    • Views: 823
    January 4th, 2017, 04:59 AM Go to last post
  10. How to write data into DDR3 SDRAM-HPS!

    Started by NguyenNgocTan, April 18th, 2014 09:20 PM
    • Replies: 8
    • Views: 21,448
    January 4th, 2017, 12:38 AM Go to last post
  11. emac0 through FPGA

    Started by Thomas Reinemann, December 29th, 2016 07:21 AM
    emac fabric
    • Replies: 0
    • Views: 774
    December 29th, 2016, 07:21 AM Go to last post
  12. Linux -> mSGDMA -> Dual Clock FIFO

    Started by tomek160191, December 22nd, 2016 07:00 AM
    • Replies: 1
    • Views: 1,053
    December 27th, 2016, 09:55 AM Go to last post
  13. Connect TSE MAC to HPS

    Started by Tricky, November 28th, 2013 02:57 AM
    • Replies: 6
    • Views: 25,423
    December 12th, 2016, 04:03 AM Go to last post
  14. de2i-150-Custom IP accessing memory

    Started by albahr, December 6th, 2016 06:11 PM
    • Replies: 0
    • Views: 773
    December 6th, 2016, 06:11 PM Go to last post
  15. Question about Audio port

    Started by Taeyangchoi, November 30th, 2016 11:31 PM
    • Replies: 0
    • Views: 683
    November 30th, 2016, 11:31 PM Go to last post
  16. Altered Application Stored In SDRAM

    Started by reberp, November 23rd, 2016 07:04 AM
    • Replies: 0
    • Views: 595
    November 23rd, 2016, 07:04 AM Go to last post
  17. DE1-SoC HPS SDRAM memory mapping

    Started by Korn, March 19th, 2016 07:55 AM
    • Replies: 2
    • Views: 1,566
    November 15th, 2016, 05:53 AM Go to last post
    • Replies: 0
    • Views: 641
    November 14th, 2016, 05:51 AM Go to last post
  18. With the Cyclone V SoC, how can I use the FPGA fabric to access the HPS DMA?

    Started by aprado, June 17th, 2014 03:26 AM
    3 Pages
    1 2 3
    • Replies: 22
    • Views: 30,089
    November 7th, 2016, 09:01 AM Go to last post
  19. DE1-SoC IP problem

    Started by mohamedmsslk, November 5th, 2016 05:54 AM
    • Replies: 0
    • Views: 532
    November 5th, 2016, 05:54 AM Go to last post
  20. Testing AXI custom component

    Started by flz47655, April 2nd, 2016 01:57 PM
    2 Pages
    1 2
    • Replies: 14
    • Views: 2,768
    November 3rd, 2016, 05:01 AM Go to last post
  21. HPS CLK1 and CLK2 crystal oscillators

    Started by sherif123, October 29th, 2016 10:52 PM
    • Replies: 1
    • Views: 669
    October 31st, 2016, 10:44 PM Go to last post
    • Replies: 1
    • Views: 625
    October 18th, 2016, 11:38 AM Go to last post
  22. De0 Nano SoC

    Started by Umesh, October 8th, 2016 05:04 AM
    • Replies: 3
    • Views: 1,049
    October 12th, 2016, 04:43 PM Go to last post
  23. Route HPS UART pins to FPGA pins DE0 nano SoC

    Started by daniel45675, October 2nd, 2016 02:47 PM
    de0 nano soc, fpga, hps, route, uart
    • Replies: 5
    • Views: 1,706
    October 10th, 2016, 05:23 PM Go to last post
  24. use DS-5 AE Evaluation for C code programming on DE0-NANO_SOC

    Started by mojcmos, September 28th, 2016 04:00 AM
    • Replies: 0
    • Views: 804
    September 28th, 2016, 04:00 AM Go to last post
  25. How to enable SDRAM ECC in the Qsys

    Started by mojcmos, September 26th, 2016 03:34 AM
    • Replies: 4
    • Views: 814
    September 26th, 2016, 11:49 PM Go to last post
  26. Altera Cyclone V SoC FPGA Development Kit GPIO chip numbering

    Started by eldorr, September 26th, 2016 10:54 PM
    • Replies: 0
    • Views: 806
    September 26th, 2016, 10:54 PM Go to last post

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