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Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 03:36 PM
    • Replies: 0
    • Views: 11,620
    October 14th, 2014, 03:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 02:37 PM
    • Replies: 0
    • Views: 30,821
    July 19th, 2013, 02:37 PM Go to last post
    • Replies: 0
    • Views: 287
    November 14th, 2016, 05:51 AM Go to last post
  1. With the Cyclone V SoC, how can I use the FPGA fabric to access the HPS DMA?

    Started by aprado, June 17th, 2014 03:26 AM
    3 Pages
    1 2 3
    • Replies: 22
    • Views: 27,633
    November 7th, 2016, 09:01 AM Go to last post
  2. DE1-SoC IP problem

    Started by mohamedmsslk, November 5th, 2016 05:54 AM
    • Replies: 0
    • Views: 225
    November 5th, 2016, 05:54 AM Go to last post
  3. Testing AXI custom component

    Started by flz47655, April 2nd, 2016 01:57 PM
    2 Pages
    1 2
    • Replies: 14
    • Views: 1,803
    November 3rd, 2016, 05:01 AM Go to last post
  4. HPS CLK1 and CLK2 crystal oscillators

    Started by sherif123, October 29th, 2016 10:52 PM
    • Replies: 1
    • Views: 341
    October 31st, 2016, 10:44 PM Go to last post
  5. Cyclone V SoC - Shared Memory Controller

    Started by Taz1984, July 15th, 2013 10:20 PM
    6 Pages
    1 2 3 ... 6
    • Replies: 50
    • Views: 52,822
    October 26th, 2016, 11:26 AM Go to last post
    • Replies: 1
    • Views: 294
    October 18th, 2016, 11:38 AM Go to last post
  6. De0 Nano SoC

    Started by Umesh, October 8th, 2016 05:04 AM
    • Replies: 3
    • Views: 574
    October 12th, 2016, 04:43 PM Go to last post
  7. High bandwidth data transfer between hps and fpga

    Started by mojcmos, September 8th, 2016 03:50 AM
    2 Pages
    1 2
    • Replies: 12
    • Views: 1,314
    October 12th, 2016, 07:28 AM Go to last post
  8. Route HPS UART pins to FPGA pins DE0 nano SoC

    Started by daniel45675, October 2nd, 2016 02:47 PM
    de0 nano soc, fpga, hps, route, uart
    • Replies: 5
    • Views: 772
    October 10th, 2016, 05:23 PM Go to last post
  9. use DS-5 AE Evaluation for C code programming on DE0-NANO_SOC

    Started by mojcmos, September 28th, 2016 04:00 AM
    • Replies: 0
    • Views: 394
    September 28th, 2016, 04:00 AM Go to last post
  10. How to enable SDRAM ECC in the Qsys

    Started by mojcmos, September 26th, 2016 03:34 AM
    • Replies: 4
    • Views: 461
    September 26th, 2016, 11:49 PM Go to last post
  11. Altera Cyclone V SoC FPGA Development Kit GPIO chip numbering

    Started by eldorr, September 26th, 2016 10:54 PM
    • Replies: 0
    • Views: 372
    September 26th, 2016, 10:54 PM Go to last post
  12. Terasic SATA/SAS HSMC Card Reference Project for Cyclone V SOC

    Started by redd, January 28th, 2016 12:42 PM
    cyclone v, hsmc, reference design, sata
    • Replies: 1
    • Views: 913
    September 23rd, 2016, 01:34 AM Go to last post
  13. Question How to generate boardinfo (xml) files?

    Started by Kunal Patwardhan, September 22nd, 2016 10:43 PM
    boardinfo, cyclone v soc, device tree source, dts
    • Replies: 1
    • Views: 421
    September 22nd, 2016, 11:41 PM Go to last post
    • Replies: 3
    • Views: 573
    September 21st, 2016, 05:33 PM Go to last post
  14. using h2f_axi_master

    Started by mojcmos, September 13th, 2016 10:11 PM
    • Replies: 0
    • Views: 335
    September 13th, 2016, 10:11 PM Go to last post
  15. How to Program Cyclone V SoC Dev Kit EPCQ256

    Started by kstolp, September 2nd, 2013 02:41 PM
    • Replies: 8
    • Views: 31,118
    September 12th, 2016, 05:12 AM Go to last post
  16. Cyclone V SoC Migration to Arria 10 SoC

    Started by johnie83, August 9th, 2016 07:10 AM
    arria 10, cyclone v
    • Replies: 1
    • Views: 535
    September 6th, 2016, 10:16 PM Go to last post
  17. need to License for ARM hard processor

    Started by mojcmos, August 28th, 2016 11:28 PM
    • Replies: 1
    • Views: 506
    September 6th, 2016, 10:09 PM Go to last post
  18. DE1-SoC HPS DDR3 Controller with UniPHY fitter error

    Started by Korn, April 10th, 2016 04:46 AM
    • Replies: 1
    • Views: 1,076
    September 6th, 2016, 07:29 PM Go to last post
    • Replies: 13
    • Views: 19,674
    August 31st, 2016, 09:56 AM Go to last post
    • Replies: 2
    • Views: 566
    August 25th, 2016, 09:43 PM Go to last post
  19. using the FPU on Cortex A9

    Started by stefmaster, December 10th, 2013 03:20 AM
    2 Pages
    1 2
    • Replies: 10
    • Views: 26,196
    August 16th, 2016, 07:15 AM Go to last post
  20. Question Problem when programming Cyclone V (DE1-SoC)

    Started by franerto, February 24th, 2016 11:57 PM
    cyclone v, de1, programming, soc
    • Replies: 5
    • Views: 1,849
    August 14th, 2016, 03:29 AM Go to last post
  21. Question about the FPGA 10/100 Ethernet (FPGA)

    Started by yeahnix, July 29th, 2013 05:33 PM
    • Replies: 5
    • Views: 30,573
    August 12th, 2016, 02:35 AM Go to last post
  22. SoC with DDR3: Fitter refuses to fit HPS_DM_0

    Started by jordanf, August 8th, 2016 08:04 AM
    • Replies: 4
    • Views: 732
    August 11th, 2016, 05:28 AM Go to last post
  23. Angry Trouble adding additional F2H_SDRAM Port

    Started by jliriano, November 7th, 2014 08:27 AM
    • Replies: 3
    • Views: 10,366
    August 9th, 2016, 05:04 PM Go to last post
  24. SOC Tools: Is Xlinx light-years ahead of Altera?

    Started by joe306, June 13th, 2016 06:12 AM
    • Replies: 2
    • Views: 815
    August 9th, 2016, 02:45 AM Go to last post
  25. Exclamation DS-5 debugger "run" or "start" option lead HPS to reset

    Started by serjjo, January 27th, 2015 05:12 AM
    2 Pages
    1 2
    debugger, ds-5
    • Replies: 11
    • Views: 7,373
    August 7th, 2016, 06:55 PM Go to last post

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