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Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 03:36 PM
    • Replies: 0
    • Views: 12,815
    October 14th, 2014, 03:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 02:37 PM
    • Replies: 0
    • Views: 31,971
    July 19th, 2013, 02:37 PM Go to last post
  1. HPS DDR3 in Cyclone V

    Started by shaiko, March 15th, 2017 01:30 AM
    • Replies: 3
    • Views: 1,719
    March 16th, 2017, 08:55 PM Go to last post
  2. Question CAN Interrupt Register

    Started by Ilya_Nikotin, March 1st, 2017 12:30 AM
    • Replies: 0
    • Views: 1,041
    March 1st, 2017, 12:30 AM Go to last post
  3. Interfacing HSMC Quad Video Daughter Card with SoCKit

    Started by techno-rogue, February 26th, 2017 12:12 PM
    • Replies: 6
    • Views: 1,692
    February 28th, 2017, 01:18 PM Go to last post
  4. preloader make problem: socfpga_cyclone5_config, Error 2

    Started by Lars71dk, August 15th, 2013 06:06 AM
    • Replies: 5
    • Views: 31,971
    February 23rd, 2017, 02:28 PM Go to last post
    • Replies: 2
    • Views: 1,625
    February 21st, 2017, 02:03 PM Go to last post
    • Replies: 0
    • Views: 1,063
    February 14th, 2017, 04:02 AM Go to last post
  5. Unhappy dwc2 ffb40000.usb Overcurrent change detected

    Started by ralph, February 7th, 2017 06:17 AM
    overcurrent, usb
    • Replies: 1
    • Views: 1,619
    February 13th, 2017, 08:45 AM Go to last post
  6. CAN bus register DE0-Nano-SoC.

    Started by yassine_ensea, January 11th, 2017 01:07 AM
    • Replies: 2
    • Views: 1,583
    February 9th, 2017, 04:28 PM Go to last post
  7. Cyclone V Soc Development kit UART signal on GPIO pins

    Started by Amna Tehreem, February 1st, 2017 11:49 PM
    • Replies: 1
    • Views: 1,371
    February 3rd, 2017, 07:02 PM Go to last post
  8. DE1-SOC 5CSEMA5F31C6 can't be detected

    Started by ujjwalaltera, January 23rd, 2017 04:38 PM
    • Replies: 8
    • Views: 2,300
    January 31st, 2017, 10:49 PM Go to last post
  9. Reading from a FIFO with DMA

    Started by pietro_carra, January 26th, 2017 07:42 AM
    • Replies: 0
    • Views: 1,122
    January 26th, 2017, 07:42 AM Go to last post
    • Replies: 2
    • Views: 1,560
    January 23rd, 2017, 07:46 AM Go to last post
  10. Question How to configure the SPI on DE0-Nano-SoC

    Started by m3!_newbie, January 15th, 2017 11:07 AM
    arm, de0-nano-soc, hps, spi, touchscreen
    • Replies: 1
    • Views: 1,814
    January 19th, 2017, 01:11 PM Go to last post
  11. Cyclone V SE Power management

    Started by nico94, January 13th, 2017 12:58 AM
    • Replies: 1
    • Views: 2,909
    January 17th, 2017, 09:16 PM Go to last post
  12. Cyclone V, DE1-SOC GPIO Header Pinout Diagram

    Started by sherrellbc, September 30th, 2014 08:40 PM
    • Replies: 4
    • Views: 16,156
    January 12th, 2017, 12:41 PM Go to last post
  13. Changing the HPS SDRAM PLL clock source from QSys

    Started by Daixiwen, January 11th, 2017 04:36 AM
    • Replies: 3
    • Views: 1,546
    January 12th, 2017, 12:33 AM Go to last post
  14. Help how to use avalon interface

    Started by gianluca87, January 10th, 2017 08:08 AM
    avalon, fpga, hps, soc
    • Replies: 3
    • Views: 1,559
    January 12th, 2017, 12:19 AM Go to last post
    • Replies: 1
    • Views: 1,111
    January 11th, 2017, 11:35 AM Go to last post
  15. cpu0_deflags4 interrupt

    Started by wieant, January 4th, 2017 04:59 AM
    • Replies: 0
    • Views: 921
    January 4th, 2017, 04:59 AM Go to last post
  16. How to write data into DDR3 SDRAM-HPS!

    Started by NguyenNgocTan, April 18th, 2014 09:20 PM
    • Replies: 8
    • Views: 21,884
    January 4th, 2017, 12:38 AM Go to last post
  17. emac0 through FPGA

    Started by Thomas Reinemann, December 29th, 2016 07:21 AM
    emac fabric
    • Replies: 0
    • Views: 907
    December 29th, 2016, 07:21 AM Go to last post
  18. Linux -> mSGDMA -> Dual Clock FIFO

    Started by tomek160191, December 22nd, 2016 07:00 AM
    • Replies: 1
    • Views: 1,249
    December 27th, 2016, 09:55 AM Go to last post
  19. Connect TSE MAC to HPS

    Started by Tricky, November 28th, 2013 02:57 AM
    • Replies: 6
    • Views: 25,819
    December 12th, 2016, 04:03 AM Go to last post
  20. de2i-150-Custom IP accessing memory

    Started by albahr, December 6th, 2016 06:11 PM
    • Replies: 0
    • Views: 862
    December 6th, 2016, 06:11 PM Go to last post
  21. Question about Audio port

    Started by Taeyangchoi, November 30th, 2016 11:31 PM
    • Replies: 0
    • Views: 780
    November 30th, 2016, 11:31 PM Go to last post
  22. Altered Application Stored In SDRAM

    Started by reberp, November 23rd, 2016 07:04 AM
    • Replies: 0
    • Views: 689
    November 23rd, 2016, 07:04 AM Go to last post
  23. DE1-SoC HPS SDRAM memory mapping

    Started by Korn, March 19th, 2016 07:55 AM
    • Replies: 2
    • Views: 1,692
    November 15th, 2016, 05:53 AM Go to last post
    • Replies: 0
    • Views: 780
    November 14th, 2016, 05:51 AM Go to last post
  24. With the Cyclone V SoC, how can I use the FPGA fabric to access the HPS DMA?

    Started by aprado, June 17th, 2014 03:26 AM
    3 Pages
    1 2 3
    • Replies: 22
    • Views: 30,991
    November 7th, 2016, 09:01 AM Go to last post
  25. DE1-SoC IP problem

    Started by mohamedmsslk, November 5th, 2016 05:54 AM
    • Replies: 0
    • Views: 602
    November 5th, 2016, 05:54 AM Go to last post

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