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Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 04:36 PM
    • Replies: 0
    • Views: 11,452
    October 14th, 2014, 04:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 03:37 PM
    • Replies: 0
    • Views: 30,675
    July 19th, 2013, 03:37 PM Go to last post
  1. Cyclone V SoC SPI Flash Support

    Started by terpaccount, June 6th, 2016 01:43 PM
    • Replies: 0
    • Views: 399
    June 6th, 2016, 01:43 PM Go to last post
  2. Question GPIO(HPS) Output how to start?

    Started by VBKesha, June 6th, 2016 07:12 AM
    cyclon v soc, gpio, hps
    • Replies: 0
    • Views: 487
    June 6th, 2016, 07:12 AM Go to last post
  3. DE1-SOC Board for Beginners

    Started by rp.beltran, March 2nd, 2016 01:10 PM
    beginner, de1-soc, ram, soc
    • Replies: 1
    • Views: 920
    June 5th, 2016, 04:36 AM Go to last post
  4. Unhappy Problem de0-nano-soc

    Started by 4ulabek, May 31st, 2016 02:33 AM
    • Replies: 2
    • Views: 738
    May 31st, 2016, 10:49 AM Go to last post
  5. Question Routing HPS I2C thru FPGA Not Working

    Started by mbp2014, September 14th, 2014 02:28 PM
    2 Pages
    1 2
    • Replies: 13
    • Views: 14,839
    May 19th, 2016, 05:04 AM Go to last post
  6. Cyclone V - EMAC ARP receive error

    Started by Altkl, May 14th, 2016 12:53 PM
    arp receive error, cyclone v, emac
    • Replies: 1
    • Views: 516
    May 16th, 2016, 06:43 AM Go to last post
  7. Read a wav file in an SD card with DE1 SoC

    Started by larryj, May 15th, 2016 06:14 PM
    • Replies: 0
    • Views: 570
    May 15th, 2016, 06:14 PM Go to last post
  8. Nios on DE0-Nano-SoC

    Started by naceradsky, May 14th, 2016 02:49 AM
    • Replies: 0
    • Views: 435
    May 14th, 2016, 02:49 AM Go to last post
  9. [SoCKit Cyclone V] HPS UART Controller to LTC connector

    Started by top94370, May 11th, 2016 05:54 AM
    • Replies: 0
    • Views: 463
    May 11th, 2016, 05:54 AM Go to last post
  10. DE0 nano Cycl.V: SDRAM parameters for Qsys

    Started by tum_flo, May 11th, 2016 01:59 AM
    • Replies: 0
    • Views: 416
    May 11th, 2016, 01:59 AM Go to last post
    • Replies: 2
    • Views: 614
    May 9th, 2016, 07:23 AM Go to last post
    • Replies: 1
    • Views: 582
    May 6th, 2016, 06:45 AM Go to last post
    • Replies: 4
    • Views: 700
    May 3rd, 2016, 01:15 PM Go to last post
  11. Arrow SoCKit FPGA-to-HPS SDRAM (f2h_sdram) Help Needed!

    Started by christnp, August 25th, 2014 05:15 PM
    arrow, ddr3, f2h_sdram, fpga-to-hps, sdram
    • Replies: 6
    • Views: 15,469
    April 28th, 2016, 06:25 AM Go to last post
  12. HPS pin current strength settings

    Started by ChrisKa, August 25th, 2015 12:40 AM
    • Replies: 1
    • Views: 928
    April 22nd, 2016, 08:55 AM Go to last post
  13. quartus_hps with qspi in quad mode

    Started by poster, April 18th, 2016 06:19 AM
    • Replies: 0
    • Views: 2,323
    April 18th, 2016, 06:19 AM Go to last post
  14. FPGA read data from HPS DDR3

    Started by Korn, April 13th, 2016 02:49 PM
    • Replies: 0
    • Views: 450
    April 13th, 2016, 02:49 PM Go to last post
  15. SOC evaluation board for learning

    Started by sherif123, April 12th, 2016 07:44 AM
    • Replies: 0
    • Views: 413
    April 12th, 2016, 07:44 AM Go to last post
  16. digital simulation model for Altera SoC (Arria 10)

    Started by amir_aa, March 24th, 2016 08:20 AM
    arm, arm core, arria 10, functional, verification
    • Replies: 2
    • Views: 789
    April 1st, 2016, 02:18 PM Go to last post
  17. Inject SDRAM ECC error on Cyclone V HPS

    Started by poster, March 30th, 2016 09:47 AM
    • Replies: 0
    • Views: 378
    March 30th, 2016, 09:47 AM Go to last post
  18. Accessing same memory address from HPS and FPGA

    Started by jocastro, February 25th, 2016 07:55 AM
    • Replies: 5
    • Views: 1,186
    March 18th, 2016, 02:59 AM Go to last post
  19. What is the TDP of a Cyclone V chip?

    Started by jocastro, March 17th, 2016 06:46 AM
    cyclone v
    • Replies: 0
    • Views: 587
    March 17th, 2016, 06:46 AM Go to last post
  20. Problems with NANO/ATLAS SOCKIT

    Started by abrueda, March 15th, 2016 07:51 AM
    • Replies: 0
    • Views: 467
    March 15th, 2016, 07:51 AM Go to last post
    • Replies: 0
    • Views: 510
    March 6th, 2016, 08:04 PM Go to last post
  21. swinfo2header defines no real addresses

    Started by jwiesemann, March 3rd, 2016 05:29 AM
    f2h, fpga2hps, h2f, hps2fpga, swinfo2header
    • Replies: 0
    • Views: 572
    March 3rd, 2016, 05:29 AM Go to last post
  22. HPS BareMetal EMAC driver

    Started by arkadish123, July 24th, 2014 02:27 PM
    emac
    • Replies: 3
    • Views: 15,079
    March 3rd, 2016, 12:58 AM Go to last post
  23. Arria10 HPS Fpga to Sdram cannot be configured above 64 bits

    Started by ganeshmirajkar, January 14th, 2016 06:20 AM
    2 Pages
    1 2
    • Replies: 12
    • Views: 2,280
    February 14th, 2016, 10:12 PM Go to last post
  24. Resuming execution in HPS after FPGA execution

    Started by jocastro, February 10th, 2016 08:22 AM
    • Replies: 2
    • Views: 756
    February 12th, 2016, 08:21 AM Go to last post
  25. arria10 availability

    Started by hugurdag, December 19th, 2015 04:21 PM
    • Replies: 2
    • Views: 860
    February 9th, 2016, 07:16 AM Go to last post
    • Replies: 4
    • Views: 1,046
    February 9th, 2016, 07:12 AM Go to last post

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