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Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 03:36 PM
    • Replies: 0
    • Views: 12,394
    October 14th, 2014, 03:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 02:37 PM
    • Replies: 0
    • Views: 31,569
    July 19th, 2013, 02:37 PM Go to last post
  1. MAC Address changes on reboot

    Started by DaveHorne, January 21st, 2014 07:24 AM
    • Replies: 7
    • Views: 21,476
    June 19th, 2017, 11:23 AM Go to last post
  2. Question Routing of I2C0 pins on SoC

    Started by Luki B, December 22nd, 2016 12:10 AM
    i2c, qsys, routing, soc
    • Replies: 3
    • Views: 1,203
    June 14th, 2017, 12:39 AM Go to last post
  3. DE0-nano: JTAG breaks when loading from EPCS

    Started by ISE_benny, June 7th, 2017 06:54 AM
    • Replies: 0
    • Views: 201
    June 7th, 2017, 06:54 AM Go to last post
  4. Cyclone V, HPS SPI routing to FPGA pins

    Started by Captain-Chaos, January 13th, 2017 01:35 AM
    • Replies: 3
    • Views: 1,572
    May 29th, 2017, 01:36 AM Go to last post
  5. Configuring IO on Cyclone V after boot

    Started by larso, May 10th, 2017 12:55 PM
    • Replies: 0
    • Views: 533
    May 10th, 2017, 12:55 PM Go to last post
  6. High bandwidth data transfer between hps and fpga

    Started by mojcmos, September 8th, 2016 03:50 AM
    3 Pages
    1 2 3
    • Replies: 20
    • Views: 3,538
    April 25th, 2017, 11:38 PM Go to last post
  7. Arria 10 - Ubuntu - make error for Uboot

    Started by lemonoje, April 25th, 2017 11:58 AM
    • Replies: 0
    • Views: 580
    April 25th, 2017, 11:58 AM Go to last post
  8. HPS Configuration in QSys: Why is hps_io exported?

    Started by DrTobbe, April 13th, 2017 06:29 AM
    hps, pin muxing, qsys
    • Replies: 3
    • Views: 948
    April 25th, 2017, 08:30 AM Go to last post
  9. FPGA-to-HPS SDRAM Interface Problem

    Started by helekjo, April 20th, 2017 04:31 AM
    • Replies: 1
    • Views: 733
    April 24th, 2017, 02:04 AM Go to last post
  10. Cyclone V SoC - Shared Memory Controller

    Started by Taz1984, July 15th, 2013 10:20 PM
    6 Pages
    1 2 3 ... 6
    • Replies: 51
    • Views: 56,236
    April 15th, 2017, 01:25 AM Go to last post
  11. GPIO access in Deo nano cyclone

    Started by sravich81, April 14th, 2017 12:39 AM
    • Replies: 0
    • Views: 690
    April 14th, 2017, 12:39 AM Go to last post
  12. Connecting HPS GPIOs to top level pins

    Started by QsXiang, April 7th, 2017 11:22 AM
    • Replies: 0
    • Views: 678
    April 7th, 2017, 11:22 AM Go to last post
  13. fpga for solar inverter and power electronics applications

    Started by engma, April 2nd, 2017 05:57 AM
    • Replies: 0
    • Views: 703
    April 2nd, 2017, 05:57 AM Go to last post
  14. Arria 10 Soc DevKit Golden Top will not build

    Started by dnovick238, March 30th, 2017 09:47 AM
    arria 10 soc, build fail, dev kit, golden top
    • Replies: 1
    • Views: 927
    March 31st, 2017, 06:07 AM Go to last post
  15. Accessing HPS-SDRAM from the FPGA

    Started by horacioEsta, March 21st, 2017 12:50 PM
    • Replies: 0
    • Views: 807
    March 21st, 2017, 12:50 PM Go to last post
  16. HPS DDR3 in Cyclone V

    Started by shaiko, March 15th, 2017 01:30 AM
    • Replies: 3
    • Views: 1,124
    March 16th, 2017, 08:55 PM Go to last post
  17. Question CAN Interrupt Register

    Started by Ilya_Nikotin, March 1st, 2017 12:30 AM
    • Replies: 0
    • Views: 743
    March 1st, 2017, 12:30 AM Go to last post
  18. Interfacing HSMC Quad Video Daughter Card with SoCKit

    Started by techno-rogue, February 26th, 2017 12:12 PM
    • Replies: 6
    • Views: 1,101
    February 28th, 2017, 01:18 PM Go to last post
  19. preloader make problem: socfpga_cyclone5_config, Error 2

    Started by Lars71dk, August 15th, 2013 06:06 AM
    • Replies: 5
    • Views: 31,138
    February 23rd, 2017, 02:28 PM Go to last post
    • Replies: 2
    • Views: 1,164
    February 21st, 2017, 02:03 PM Go to last post
    • Replies: 0
    • Views: 765
    February 14th, 2017, 04:02 AM Go to last post
  20. Unhappy dwc2 ffb40000.usb Overcurrent change detected

    Started by ralph, February 7th, 2017 06:17 AM
    overcurrent, usb
    • Replies: 1
    • Views: 1,092
    February 13th, 2017, 08:45 AM Go to last post
  21. CAN bus register DE0-Nano-SoC.

    Started by yassine_ensea, January 11th, 2017 01:07 AM
    • Replies: 2
    • Views: 1,135
    February 9th, 2017, 04:28 PM Go to last post
  22. Cyclone V Soc Development kit UART signal on GPIO pins

    Started by Amna Tehreem, February 1st, 2017 11:49 PM
    • Replies: 1
    • Views: 993
    February 3rd, 2017, 07:02 PM Go to last post
  23. DE1-SOC 5CSEMA5F31C6 can't be detected

    Started by ujjwalaltera, January 23rd, 2017 04:38 PM
    • Replies: 8
    • Views: 1,664
    January 31st, 2017, 10:49 PM Go to last post
  24. Reading from a FIFO with DMA

    Started by pietro_carra, January 26th, 2017 07:42 AM
    • Replies: 0
    • Views: 817
    January 26th, 2017, 07:42 AM Go to last post
    • Replies: 2
    • Views: 1,116
    January 23rd, 2017, 07:46 AM Go to last post
  25. Question How to configure the SPI on DE0-Nano-SoC

    Started by m3!_newbie, January 15th, 2017 11:07 AM
    arm, de0-nano-soc, hps, spi, touchscreen
    • Replies: 1
    • Views: 1,301
    January 19th, 2017, 01:11 PM Go to last post
  26. Cyclone V SE Power management

    Started by nico94, January 13th, 2017 12:58 AM
    • Replies: 1
    • Views: 1,047
    January 17th, 2017, 09:16 PM Go to last post
  27. Cyclone V, DE1-SOC GPIO Header Pinout Diagram

    Started by sherrellbc, September 30th, 2014 08:40 PM
    • Replies: 4
    • Views: 15,342
    January 12th, 2017, 12:41 PM Go to last post

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