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Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 04:36 PM
    • Replies: 0
    • Views: 11,564
    October 14th, 2014, 04:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 03:37 PM
    • Replies: 0
    • Views: 30,780
    July 19th, 2013, 03:37 PM Go to last post
  1. preloader make problem: socfpga_cyclone5_config, Error 2

    Started by Lars71dk, August 15th, 2013 07:06 AM
    • Replies: 5
    • Views: 29,920
    Yesterday, 03:28 PM Go to last post
    • Replies: 2
    • Views: 152
    February 21st, 2017, 03:03 PM Go to last post
    • Replies: 0
    • Views: 68
    February 14th, 2017, 05:02 AM Go to last post
  2. Unhappy dwc2 ffb40000.usb Overcurrent change detected

    Started by ralph, February 7th, 2017 07:17 AM
    overcurrent, usb
    • Replies: 1
    • Views: 113
    February 13th, 2017, 09:45 AM Go to last post
  3. CAN bus register DE0-Nano-SoC.

    Started by yassine_ensea, January 11th, 2017 02:07 AM
    • Replies: 2
    • Views: 203
    February 9th, 2017, 05:28 PM Go to last post
  4. Cyclone V Soc Development kit UART signal on GPIO pins

    Started by Amna Tehreem, February 2nd, 2017 12:49 AM
    • Replies: 1
    • Views: 129
    February 3rd, 2017, 08:02 PM Go to last post
  5. DE1-SOC 5CSEMA5F31C6 can't be detected

    Started by ujjwalaltera, January 23rd, 2017 05:38 PM
    • Replies: 8
    • Views: 295
    January 31st, 2017, 11:49 PM Go to last post
  6. Reading from a FIFO with DMA

    Started by pietro_carra, January 26th, 2017 08:42 AM
    • Replies: 0
    • Views: 110
    January 26th, 2017, 08:42 AM Go to last post
    • Replies: 2
    • Views: 211
    January 23rd, 2017, 08:46 AM Go to last post
  7. Question How to configure the SPI on DE0-Nano-SoC

    Started by m3!_newbie, January 15th, 2017 12:07 PM
    arm, de0-nano-soc, hps, spi, touchscreen
    • Replies: 1
    • Views: 182
    January 19th, 2017, 02:11 PM Go to last post
  8. Cyclone V SE Power management

    Started by nico94, January 13th, 2017 01:58 AM
    • Replies: 1
    • Views: 161
    January 17th, 2017, 10:16 PM Go to last post
  9. Cyclone V, HPS SPI routing to FPGA pins

    Started by Captain-Chaos, January 13th, 2017 02:35 AM
    • Replies: 1
    • Views: 195
    January 17th, 2017, 08:52 AM Go to last post
  10. Cyclone V, DE1-SOC GPIO Header Pinout Diagram

    Started by sherrellbc, September 30th, 2014 09:40 PM
    • Replies: 4
    • Views: 13,751
    January 12th, 2017, 01:41 PM Go to last post
  11. Changing the HPS SDRAM PLL clock source from QSys

    Started by Daixiwen, January 11th, 2017 05:36 AM
    • Replies: 3
    • Views: 207
    January 12th, 2017, 01:33 AM Go to last post
  12. Help how to use avalon interface

    Started by gianluca87, January 10th, 2017 09:08 AM
    avalon, fpga, hps, soc
    • Replies: 3
    • Views: 237
    January 12th, 2017, 01:19 AM Go to last post
    • Replies: 1
    • Views: 179
    January 11th, 2017, 12:35 PM Go to last post
  13. Question Routing of I2C0 pins on SoC

    Started by Luki B, December 22nd, 2016 01:10 AM
    i2c, qsys, routing, soc
    • Replies: 2
    • Views: 244
    January 10th, 2017, 06:43 AM Go to last post
  14. cpu0_deflags4 interrupt

    Started by wieant, January 4th, 2017 05:59 AM
    • Replies: 0
    • Views: 124
    January 4th, 2017, 05:59 AM Go to last post
  15. How to write data into DDR3 SDRAM-HPS!

    Started by NguyenNgocTan, April 18th, 2014 10:20 PM
    • Replies: 8
    • Views: 19,972
    January 4th, 2017, 01:38 AM Go to last post
  16. emac0 through FPGA

    Started by Thomas Reinemann, December 29th, 2016 08:21 AM
    emac fabric
    • Replies: 0
    • Views: 181
    December 29th, 2016, 08:21 AM Go to last post
  17. Linux -> mSGDMA -> Dual Clock FIFO

    Started by tomek160191, December 22nd, 2016 08:00 AM
    • Replies: 1
    • Views: 234
    December 27th, 2016, 10:55 AM Go to last post
  18. Connect TSE MAC to HPS

    Started by Tricky, November 28th, 2013 03:57 AM
    • Replies: 6
    • Views: 24,138
    December 12th, 2016, 05:03 AM Go to last post
  19. de2i-150-Custom IP accessing memory

    Started by albahr, December 6th, 2016 07:11 PM
    • Replies: 0
    • Views: 182
    December 6th, 2016, 07:11 PM Go to last post
  20. Question about Audio port

    Started by Taeyangchoi, December 1st, 2016 12:31 AM
    • Replies: 0
    • Views: 184
    December 1st, 2016, 12:31 AM Go to last post
  21. Altered Application Stored In SDRAM

    Started by reberp, November 23rd, 2016 08:04 AM
    • Replies: 0
    • Views: 183
    November 23rd, 2016, 08:04 AM Go to last post
  22. DE1-SoC HPS SDRAM memory mapping

    Started by Korn, March 19th, 2016 08:55 AM
    • Replies: 2
    • Views: 1,005
    November 15th, 2016, 06:53 AM Go to last post
    • Replies: 0
    • Views: 236
    November 14th, 2016, 06:51 AM Go to last post
  23. With the Cyclone V SoC, how can I use the FPGA fabric to access the HPS DMA?

    Started by aprado, June 17th, 2014 04:26 AM
    3 Pages
    1 2 3
    • Replies: 22
    • Views: 27,213
    November 7th, 2016, 10:01 AM Go to last post
  24. DE1-SoC IP problem

    Started by mohamedmsslk, November 5th, 2016 06:54 AM
    • Replies: 0
    • Views: 193
    November 5th, 2016, 06:54 AM Go to last post
  25. Testing AXI custom component

    Started by flz47655, April 2nd, 2016 02:57 PM
    2 Pages
    1 2
    • Replies: 14
    • Views: 1,630
    November 3rd, 2016, 06:01 AM Go to last post

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