Results 1 to 2 of 2

Thread: Using PLL to synchronize Data stream on Cyclone III

  1. #1
    Join Date
    Aug 2010
    Posts
    7
    Rep Power
    1

    Default Using PLL to synchronize Data stream on Cyclone III

    Hi everyone,
    I have a 125MHz asynchronus NRZI bit-stream as an input into my FPGA. I want to sample this bit-stream and make sure, that I sample each bit once and correct. Can I use the NRZI bit stream as the reference-input to a PLL to phase-allign the generated clock to the data and then sample it with a Flip Flop on the falling edge?

    Thank you very much for your help



  2. #2
    Join Date
    Dec 2007
    Location
    Bochum Germany
    Posts
    5,801
    Rep Power
    1

    Default Re: Using PLL to synchronize Data stream on Cyclone III

    No. As long as can't derive a continuous square wave from the input signal, a regular FPGA PLL won't work. The PLL dynamic phase shift feature can be utilized to make a software CDR with limited frequency range, well sufficient for a data stream with crystal timed frequency.

Similar Threads

  1. How to receive slow bit stream data using GXB
    By Hua in forum FPGA, Hardcopy, and CPLD Discussion
    Replies: 9
    Last Post: October 13th, 2011, 06:20 AM
  2. How to store data from A/D onto DDR2 SDRAM and stream out
    By dsvoboda in forum FPGA, Hardcopy, and CPLD Discussion
    Replies: 1
    Last Post: September 12th, 2011, 07:42 AM
  3. CDR Solution for 2Mbps 8B10B data stream
    By Hua in forum FPGA, Hardcopy, and CPLD Discussion
    Replies: 6
    Last Post: March 21st, 2011, 05:30 PM
  4. Extract pixel data from video stream
    By mmcd98 in forum General Discussion Forum
    Replies: 9
    Last Post: January 24th, 2011, 07:03 AM
  5. how to save the data stream
    By beyond in forum General Discussion Forum
    Replies: 0
    Last Post: June 5th, 2006, 04:26 AM

Bookmarks

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •