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  Altera Forums > Device and Tools Related > FPGA, Hardcopy, and CPLD Discussion

SOPC component Hardware TCl file Error

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  #1  
Old January 28th, 2010, 11:25 PM
jshah jshah is offline
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Default SOPC component Hardware TCl file Error

Hi,

I have made an IP component TCL file for SOPC builder in quartus II version 8.1. Now I am using the same file in quartus II version 9.0, it gives me error while adding a component. In TCL file I have used the callback function to display the message on component editor as per entered parameter. Please see attached screen shot for the error message. Also find the callback function added in TCL file below.

# callouts
set_module_property Validation_Callback validate

# Module parameters
add_parameter "Simulation" "integer" "0" "0 = no simulation; 1 = simulation"
set_parameter_property "Simulation" "display_name" "Enter Simulation Option"
set_parameter_property "Simulation" ALLOWED_RANGES {0 1}

proc validate {} {
set Simualtion [get_parameter_value "Simulation"]
if {$Simulation == 0} {
send_message "info" "Disabling simulation."
} else {
send_message "info" "Enabling simulation."
}


}

Can any one help me in debugging this?

Regards,
Jigar G. Shah
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File Type: jpg TCL_error.JPG (20.7 KB, 10 views)
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  #2  
Old January 29th, 2010, 12:33 AM
jakobjones jakobjones is offline
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Default Re: SOPC component Hardware TCl file Error

Try this instead:

Code:
# callouts
set_module_property VALIDATION_CALLBACK validate

# Module parameters
add_parameter SIMULATION INTEGER "0" ""
set_parameter_property SIMULATION DISPLAY_NAME "Enter Simulation Option"
set_parameter_property SIMULATION ALLOWED_RANGES {0:No Simulation 1:Simulation}

proc validate {} {
  set simulation [get_parameter_value SIMULATION]
  if {$simulation == 0} {
    send_message "Info "Disabling simulation."
  } else {
    send_message Info "Enabling simulation."
  }
}
Jake
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  #3  
Old January 29th, 2010, 12:49 AM
jshah jshah is offline
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Default Re: SOPC component Hardware TCl file Error

Thanks Jake, It works.
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