[baldur]

I am designing a board with a Cyclone III in EQFP144 package. My I/O voltage is 3.3V and I will be using a serial configuration device.
I am wondering about how to wire up the configuration device and the MSEL pins.
I have looked at the Cyclone III handbook and it raises some questions about the availability of fast AS boot.

AS Fast POR with a 2.5- or 3.0-V configuration voltage standard is not available for devices that do not have the
MSEL [3] pin (for more information about devices that support AS Fast POR, refer to Table 10*2).

I am using 3.3V I/O and it does not explicitly state whether fast POR is available with 3.3V or not, only that it is unavailable with 2.5 and 3.0V.
It is however implied by the MSEL table that it is not available with 3.3V either but I'm not sure.

Also, we get to the part about the POR circuitry and I get a bit confused again.

If you cannot meet the maximum VCC ramp time requirement, you must use an
external component to hold nCONFIG low until the power supplies have reached their
minimum recommended operating levels. Otherwise, the device may not properly
configure and enter user mode.

Conclusion
Cyclone III devices offer hot socketing allowing the device to power-up successfully
without any power-sequencing. The POR circuitry keeps the devices in the reset state
until the VCC is within operating range.

The conclusion seem to contradict the previous paragraph about needing to keep the VCC ramp time short. I saw something about different power requirements using fast POR mode but nothing about what exactly those requirements are.
I'm having a hard time determining from the documentation in what scenarios I can consider using fast POR mode vs standard POR mode.

[FvM]

You can simply assume, that MSEL[3] is tied to 1, if it's not exposed at the package you are using (it has a pull-up, and the chip doesn't know, what package it has been put in). So what do you see in the table?

"Fast" POR modes are only relevant for applications that require to minimize the reset sequence. They don't affect the configuration speed itself. As discussed in the hardware handbook, problems can occur e.g. with non-monotonic supply voltages ramps. Obviously, they are more likely with fast POR. You are asking, why the specification requires a maximum supply ramp time. The handbook doesn't exactly tell. But as a simple explanation, consider the fact, that it's difficult to reproduce exact POR thresholds with basically digital chip technology. A simple solution is to use a lower threshold and specify a safety margin at the time scale.

[chiszp]

I have the same issue. From Chapter 9 of the Cyclone III Device Handbook, Volume I, page 9-10:

"The MSEL pins are powered by VCCINT. The MSEL[3..0] pins have 9-kohm internal pull-down resistors that are always active."

This leads me to believe that MSEL[3] is stuck at 0 if it is not available in a package. Are you sure that MSEL[3] is pulled high if it is not available in a package?

I'm hoping that this is not the case since I was to use the 3.3V FPP configuration mode (MSEL[3..0] = 1110) on the PQFP-240 package. Is this supported?

[FvM]

I apologize for confusing the discussion with telling about pull-up resistors. They are of-course pull-down resistors.

The configuration operation for packages without MSEL[3] can't be explained by pull-up or pull-down resistors. I had to read the Cyclone III handbook thorougly to figure out what they are doing here. After reviewing the topic, I completely agree with baldur, that Altera doesn't manage to give an understandable explanation.

I found a simple explanation, however. Just read the device handbook literally:

The AS Fast POR configuration scheme at 3.0- or 2.5-V configuration voltage standard and the AP configuration scheme are not supported in Cyclone III devices without the MSEL[3] pin. To configure these devices with other supported configuration schemes, select the MSEL[2..0] pins according to the MSEL settings in Table 9–7.

Table 9.7 is refering to the Rev. 3 Handbook.

If you wipe-out the unsupported AP and "Fast" AS 2.5/3.0V from the table and ignore the Cyclone III LS related entries, 7 unique codings of MSEL[2..0] are left over. All have MSEL[3] = MSEL[2]. So obviously MSEL[3] is bonded to the MSEL[2] pin.

If this explanation is right (I'm rather sure about), why it's not simply written in the device handbook?

[amilcar]

Well, you could file a bug report to altera, that way your suspicions might get confirmed and include in future user manuals.

[FvM]

Here is a table of the configuration schemes supported for small package Cyclone III devices according to the device handbook: