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VHDL starter/biginer

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  #1  
Old February 25th, 2010, 10:10 PM
Ernesto1924 Ernesto1924 is offline
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Default VHDL starter/biginer

Hello everyone I new in using ModelSim XE III/Starter and have this project to start:

1.Write a VHDL description of an SR latch
a.Use the characteristic equation
b.Use logic gates
c.Use a conditional assignment statement
2.A 4-bit magnitude comparator chip (http://focus.ti.com/lit/ds/symlink/sn74ls85.pdf) compares two 4-bit numbers and produces a three bit output.
a.Write behavioral VHDL description for this comparator chip.
b.Using structural VHDL, cascade two 4-bit chips to make an 8-bit magnitude comparator. Include block diagram.
3.The 74194 four-bit bidirectional shift register (http://focus.ti.com/lit/ds/symlink/cd74hc194.pdf) includes an asynchronous reset, parallel load and left/right shift.
a.Write a behavioral VHDL model for the 74194.
b.How can this be extended to an 8-bit shift register? Implement in VHDL.
4.Design a counter that repeatedly counts in the sequence: 0000, 0001, 0010, 0100, 1000, 0000, …. An asynchronous load input loads the counter with 0000.

I need help for this project while in the mid-time I'm reading and getting familiar with the program...any help will be truly appreciated...
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  #2  
Old February 26th, 2010, 02:35 AM
amilcar amilcar is offline
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amilcar is pretty smartamilcar is pretty smartamilcar is pretty smartamilcar is pretty smartamilcar is pretty smartamilcar is pretty smart
Default Re: VHDL starter/biginer

Sorry, but the idea of the assignment is that you should go out and read some books.

If we solved the assignment for you, then you would have learn nothing at all.
And that contradicts the purpose of the exercise.
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  #3  
Old February 26th, 2010, 02:55 AM
lvzhichao lvzhichao is offline
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Default Re: VHDL starter/biginer

it's correct what amilcar says.....
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  #4  
Old March 17th, 2010, 05:00 AM
imag3ne imag3ne is offline
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Default Re: VHDL starter/biginer

jj it is a correct
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  #5  
Old May 7th, 2010, 05:27 AM
borrows123 borrows123 is offline
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Default Re: VHDL starter/biginer

My vote is for "amilcar"...
He saying 100% correct...
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  #6  
Old May 23rd, 2010, 09:53 PM
rochmadp rochmadp is offline
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Default Re: VHDL starter/biginer

That isn't difficult, I know you can do it...
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