In my SOPC system, the NIOS accesses an external SRAM through a customized SRAM controller. Before this point I was using the onchip ram to run C code in both hardware and functional simulation (which is supported by default by the simulation flow). I would like to run the C code from the external SRAM, and would like to be able to simulate that.
To simulate running C code from SRAM, I will need to initializa the SRAM with a HEX file converted from ELF file. Before this point the NIOS EDS generates the HEX file automatically based on the ELF, the data width and address width of the onchip RAM. Is it possible to generate the HEX file for the external SRAM if we supply the data and address width of it?