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Thread: pulse generator (need help)

  1. #1
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    Unhappy pulse generator (need help)

    I want to generate 25Hz,50Hz,100Hz pulse signals!

    The singal is bad when I use frequency division!

    Is there a better way to generate the signals?

    Thank you very much!

    --a friend from China!
    Last edited by hasea; October 30th, 2010 at 07:12 AM.

  2. #2
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    Default Re: pulse generator (need help)

    how are you dividing the signals? are you gating the clock?

    you'd be better off using a PLL or clock enble signals

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    Default Re: pulse generator (need help)

    Why the signal is bad with frequency division?
    Do you use schematic or HDL code?

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    Default Re: pulse generator (need help)

    Quote Originally Posted by nplttr View Post
    Why the signal is bad with frequency division?
    Do you use schematic or HDL code?
    i use verilog ,the square wave contains lots of high frequency waves!
    i also use PLL!
    Last edited by hasea; November 2nd, 2010 at 07:03 AM.

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    Default Re: pulse generator (need help)

    Do you see the high frequency glitches experimentally?

    If yes, did your logic analyzer sample your output synchronously?
    If not sampling synchronously, it is normal that you see glitches.

    Remember that you only need that the outputs are stable and have the proper values one setup time before the next active clock edge.

  6. #6
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    Default Re: pulse generator (need help)

    Thank you very much!

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