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Thread: De2-115 sram

  1. #1
    Join Date
    Jun 2010
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    Default De2-115 sram

    Hello, I'm having trouble with the university program SRAM core. There's only one option and that is to select the target board (DE2-115). However, when I go to run my C code it always tells me my processor is not responding.

    Because I'm simply just trying to get my SRAM to host my C code (so I can use the DRAM for other purposes) I only have a Nios CPU, switches, and the SRAM in my design.

    Does anyone know what could be going on or what I should do? Here's everything just for calcification. Also, the system is not accidentally left in a constant reset state; although that has happened to me before!

    /////////////////////////// VERILOG ////////////////////////////////

    module dram_system(

    input CLOCK_50;
    input [17:0] SW;
    inout [15:0] SRAM_DQ;
    output[19:0] SRAM_ADDR;
    output SRAM_CE_N;
    output SRAM_WE_N;
    output SRAM_OE_N;
    output SRAM_UB_N;
    output SRAM_LB_N;

    dramImageCPU dCPU (


    ///////////////////////////// NIOS /////////////////////////////
    #include <iostream>
    using namespace std;
    int main (void) {
    cout << "Running..." << endl;
    return 0;

    -- Like I said, I just want it to run:

    bash-3.1$ nios2-download -g *.elf
    Using cable "USB-Blaster [USB-0]", device 1, instance 0x00
    Pausing target processor: not responding.
    Resetting and trying again: FAILED
    Leaving target processor paused

    I tried to make a custom SoPC module for the SRAM but I don't think I really know what I'm doing well enough for that, it didn't work. Now, this isn't really all that big a deal project wise since I'm just using the SDRAM controller for other portions but I do need the SRAM to work eventually so I'm open to ideas.

    Ideally, I would like to make my own core anyway but I don't really know how to do it. Thanks

  2. #2
    Join Date
    Oct 2010
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    Default Re: De2-115 sram

    My apologisies to Terasic and people interested:
    once i have lowered clock within access time of sram on the board everything was fine. Still can not explain why original Terasic design did not work.
    ---below my original answer: ----
    I am pretty sure that original IP from terasic “Terasic_sram “ has some problem. I had simple test writing and reading values from SRAM and it failed. Then I took one of the original sample design from de2-115 and tried to make simple “hello world”. It did load when code was in on chip or sdram. It did not load when i asked to download code to sram. In addition to this I have tried to run the same sram test (code in sdram) and it failed. My simple memory tests works nicely on all other boards.
    Zbigniew , sydney
    Last edited by zbigniew; February 8th, 2011 at 04:09 PM.

  3. #3
    Join Date
    Jan 2013
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    Default Re: De2-115 sram


    Could you please tell me your timing parameters. I could not get it working on DE2-115 with the following for the Terasic SRAM IP:

    Setup 0
    Read Wait 1
    Write Wait 0
    Hold 0
    Read Latency 0


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