Hi,

I have to setup emac0 RGMII through FPGA. I read the https://rocketboards.org/foswiki/vie...IExampleDesign example and build my system similarly.

Linux shows the link is up:

dmesg:

libphy: stmmac-0:04 - Link is Up - 1000/Full
libphy: stmmac-1:05 - Link is Up - 1000/Full

I know this message is related to the MDIO-IF.

However ifconfig shows
eth0 Link encap:Ethernet HWaddr 00:4E:8B:C3:E5:9B
inet addr:192.168.1.110 Bcast:192.168.1.255 Mask:255.255.255.0
inet6 addr: fe80::24e:8bff:fec3:e59b/64 Scope:Link
inet6 addr: 2a02:810a:c0:17c4:24e:8bff:fec3:e59b/64 Scope:Global
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:8685 errors:0 dropped:0 overruns:0 frame:0
TX packets:2687 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:1275057 (1.2 Mi TX bytes:406534 (397.0 Ki
Interrupt:152 Base address:0xc000

eth1 Link encap:Ethernet HWaddr 00:4E:8B:C3:E5:9C
inet addr:192.168.2.108 Bcast:192.168.2.255 Mask:255.255.255.0
inet6 addr: fe80::24e:8bff:fec3:e59c/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:705 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:0 (0.0 TX bytes:198084 (193.4 Ki
Interrupt:147 Base address:0x8000

I'm sure it depends on hardware, then I exchange eth0 and eth1 the other doesn't work.

Furthermore I found, the Tx clock from the RGMII to GMII adapter is 2.5 MHz and consistently the Tx clock from the splitter to the HPS too. The emac0_gtx_clk = 125 MHz. But the HPS outputs only data on emac0_phy_txd_o [3.0]. That means Tx uses only 4 bits.

Why only 4 bits are used? Why outputs the RGMI2GMII adapter only 2.5 MHz.

Any hints?

Thanks Tom