Hi,

I'm working on software running on a Cyclone V SoC HPS, and I occasionally get an interrupt being
triggered on GIC vector 45. According to Table 9-3: GIC Interrupt Map this equals cpu0_deflags4.
Apart from this reference I cant seem to find any info on this specific interrupt source, i.e. how/why
it is triggered and how to handle it, so any information on these 'deflags' irqs is welcome.

Regards,
Wieant