I am using the Output DDR interface in one of my submodules in the hierarchy. I see that the output register is not set in spite of me selecting the option "Registers powerup high". Also, I see that the data is being passed from input to output of the primitive even though, outputclocken is low.
Is the IP only to be used when the output of the same directly drives the output pin? Can it be used in internal modules whose output drive some internal signals in the next level of hierarchy
If no, Is there any alternate primitive to help me achieve the same?
If yes, could you please tell me why I see this behavior?
Your help is appreciated.