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Thread: Driving Ladder DAC

  1. #11
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    Default Re: Driving Ladder DAC

    The first image is what I would expect to see; each bar is about twice the height of the previous bar.
    The other two images appear to have an added bias (ie, base value) compared to the first image.

    If as you say the resistor values are 300-600-1200-2400-4800-9600-19200-38400-76800 (like the baud rates...) then if the passive pullup were enabled, typically about 25K, it would really start to affect the values above 9600 rather dramatically, enabling a 25K pullup to H, when your resistor is pulling to L, forming a voltage divider.

    Just my suspicion based on your waveforms.

  2. #12
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    Default Re: Driving Ladder DAC

    I found the menu responsible for this in the pin planner. According to "this page" there is no way around this. Also there is nothing useful in the "pin connection guidelines" for cyclone5 devices..
    So is there a way to remedy this?
    Last edited by Camper; May 11th, 2018 at 12:41 PM.

  3. #13
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    Default Re: Driving Ladder DAC

    Quote Originally Posted by Camper View Post
    I found the menu responsible for this in the pin planner. According to "this page" there is no way around this. Also there is nothing useful in the "pin connection guidelines" for cyclone5 devices..
    So is there a way to remedy this?
    That indicates that before a device is configured, and during configuration, the weak pullups will be enabled on the I/O pins. However, you can configure the I/Os to have no weak pullup and no bus hold, so a output that is disabled will only source the leakage current (between -30uA and +30uA per datasheet). BTW 30uA at 3.3V is about 110K effective ohms (minimum; will be higher for lower currents) so even with the weak pullup disabled there will be a pullup/pulldown of something on the order of 110K to 220K or so ohms per I/O.

    Picture of the I/O structure:
    Attached Images Attached Images
    Last edited by ak6dn; May 11th, 2018 at 02:37 PM.

  4. #14
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    Default Re: Driving Ladder DAC

    I was looking at another board that may be better at these things. So if I understand correctly even if I get a Max10 device, and it is seemingly better at disabling pullup resistance.
    It will not do the job of having it's pins in total isolation?

    I had a little test disabling bus hold and weak pull ups, dont know if it looks consistent with having a 110k pullup?

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  5. #15
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    Default Re: Driving Ladder DAC

    So have you considered using an R-2R ladder, instead of an R-2R-4R-8R-... binary weighted ladder?

    In either case you would drive each DAC select bit to either 0V or Vref (ie, 3.3V VCCio in your case). High-Z state would not be used.

    Example circuit: (image 1 below)

    R-2R uses about twice the resistors as does a binary ladder, but there are only two values required (R and 2R) instead of 1R, 2R, 4R, 8R, etc

    Note the TERM node at the upper left in the R-2R schematic should be connected to GROUND in the simplest case.

    So just for yucks I drew up an LTspice circuit for a 4bit binary 1K-2K-4K-8K and a 4b binary R-2R with 1K and 2K resistors. Ran the codes from 0xF down to 0x0.

    Here is the result: (image 2 below)

    I drove each bit with either a 0V or 1V value with a period that is a multiple of 1usec, and a 5ns rise/fall time. To rescale to 3.3V for example just multiply by that factor.

    Overall I'd say the results are pretty comparable. Binary ladder uses fewer resistors, but pickier values. R-2R uses more resistors but easier to choose values.

    Note each bit is driven to either LOW (ie, 0V) or HIGH (ie, 3.3V). 'Z' high impedance value is not required, so I don't understand how/why that originally came into the picture.
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    Last edited by ak6dn; May 13th, 2018 at 04:29 AM.

  6. #16
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    Default Re: Driving Ladder DAC

    Thanks for the help, the advice you gave me i'm going to check up on that, its awesome!


    Note each bit is driven to either LOW (ie, 0V) or HIGH (ie, 3.3V). 'Z' high impedance value is not required, so I don't understand how/why that originally came into the picture.
    I dont really think this board was actually doing the right thing here, it would be cool to have such a state. Maybe only for audio? You are right tho, it doesnt have to be bidirectional.
    I had a rail going at 0,05%, using R2R, found the busses on my GPIO connector drive pretty well, the voltages are pretty consistent along the bus. "opportunism I guess".

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