I am trying to simulate a PLL with a one reconfiguration module. With Quartus and ModelSim I can compile all the system (with the PLL and the reconfiguration module among others) perfectly without any errors. But when I try simulate the system completely ModelSim return this error:

# Loading work.pll_controller(funcional)
# Loading work.pll_reconfig(rtl)
# ** Warning: (vsim-3473) Component instance "pll_reconfig_inst : altera_pll_reconfig_top" is not bound.
# Time: 0 ps Iteration: 0 Instance: /vpg/PLL_RECONFIG0 File: C:/DVI_14/PLL_RECONFIG_sim/PLL_RECONFIG.vhd
# Loading altera_lnsim.altera_lnsim_components
# Loading work.pll_pxl(rtl)
# Loading sv_std.std
# Loading altera_lnsim.altera_lnsim_functions
# Loading altera_lnsim.altera_pll
# Loading altera_lnsim.dps_extra_kick
# Loading altera_lnsim.dprio_init
# Loading altera_lnsim.altera_pll_dps_lcell_comb
# Loading altera_lnsim.altera_arriav_pll
# ** Error: (vsim-3033) /build/swbuild/SJ/nightly/17.1std/590/l64/work/modelsim/eda/sim_lib/altera_lnsim.sv(24438): Instantiation of 'arriav_ffpll_reconfig' failed. The design unit was not found.
# Time: 0 ps Iteration: 0 Instance: /vpg/PLL_PXL0/pll_pxl_altera_pll_altera_pll_i_640/genblk2/genblk2/arriav_pll File: /build/swbuild/SJ/nightly/17.1std/590/l64/work/modelsim/eda/sim_lib/altera_lnsim.sv
# Searched libraries:
# C:/DVI_14/simulation/modelsim/rtl_work
# Loading work.resolution_gen(funcional)
# Loading work.vga_gen(funcional)
# Error loading design



Someone knows what can occur?

Thanks in advance.