Hi,
I have a design that uses Avalon ST interfaces. I'm verifying my design using the Altera Avalon ST BFM (both source and sink) in Modelsim.


Modelsim runs out of memory when it tries to load up the design. Since this is a relatively small design I suspected that the BFMs where causing the excessive memory usage.


So I made a separate test bench with an Avalon ST Source BFM connected directly to an Avalon ST Sink BFM without any other logic. The test bench sends four 16 bit words from the source to the sink. The Modelsim Memory usage was at 3.5GB!.

Since Modelsim is a 32 bit app, it can't use more than 4GB of memory and that's why my simulation was running out of memory.


As a test, I did a back to back Avalon MM test bench (Master->Slave) and the maximum memory usage was 893MB.


Does anybody know why the Avalon ST BFMs take up so much memory? Is there anything I can do to reduce the memory usage? The BFMs were generated using the IP generator in Quartus 17.

Thanks