Hi all

I implemented the Jam STAPL ByteCode Player (revision 2.2) on an embedded platform in order to program/configure a MAX10 FPGA via JTAG directly from an embedded processor.

This was working well and the sequence of events to update the MAX 10 was:
- Compile new FPGA image in Quartus v15 or v16.
- Convert *.pof to *.jbc using Quartus Programmer.
- Compile *.jbc data as part of embedded software image.
- Run embedded application, which then updates the FPGA via the JTAG port.

With Quartus v17 I find that the embedded JAM byte-code Player fails with an exit code 10: JBIC_INTERNAL_ERROR.

What I have found is the following:
- The v17 *.jbc (generated from the *.pof) triggers a "configuring SRAM device(s)..." step which was not seen during programming before.
- On inspecting the *.jam format for quartus v16 and v17 I saw that the "ALG_VERSION" has incremented from 67 to 68. (JAM version remains 2.0)
- I can compile my FPGA image with Quartus v17 and then use the quartus_cpf.exe utility from Quartus 16 to generate the *.jbc and achieve success. (Hence I assume algorithm 67 or 68 is used within the quartus_cpf.exe utility...)

My questions:
- What changed between JAM generation algorithm 67 and 68 and why?
- Is this a known issue that the embedded STAPL bytecode player is unable to program pof jbc files generated with algorithm 68? (or is this an issue with my implementation of the jbc player)

I can obviously use the workaround as described, but would appreciate any more information on this to ensure that I do not run into incompatibilities in the future.