Results 1 to 4 of 4

Thread: unused prn/clrn inputs

  1. #1
    Join Date
    Jul 2018
    Posts
    2
    Rep Power
    1

    Default unused prn/clrn inputs

    Noob question if I may.
    In the schematic editor, how should I pull up unused prn/clrn inputs to a flip flop?
    Currently I tie them to an unassigned input pin default vcc. Circuit works fine, but that doesn't seem right.

  2. #2
    Join Date
    Feb 2018
    Posts
    142
    Rep Power
    1

    Default Re: unused prn/clrn inputs

    Hi,
    In the schematic editor, how should I pull up unused prn/clrn inputs to a flip flop
    Using Assignment Editor you can pull up, check the screenshot.
    https://www.altera.com/support/suppo...PullupResistor

    Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

    Best Regards
    Vikas Jathar
    (This message was posted on behalf of Intel Corporation)
    Attached Images Attached Images

  3. #3
    Join Date
    Jul 2018
    Posts
    2
    Rep Power
    1

    Default Re: unused prn/clrn inputs

    I know about pin pullups, thanks. My question was about unused flip flop inputs. Using discreet logic I would pull these up. Currently I'm assuming if I leave them unconnected the synthesizer will optimise the function out. Seems to work.

  4. #4
    Join Date
    Feb 2018
    Posts
    142
    Rep Power
    1

    Default Re: unused prn/clrn inputs

    Hi,
    Can you please brief your question with Schematic editor (screenshot), what are you trying to do & what issue are you facing?

    Best Regards
    Vikas Jathar
    (This message was posted on behalf of Intel Corporation)

Similar Threads

  1. MAX 7000 unused dedicated inputs
    By Awann in forum FPGA, Hardcopy, and CPLD Discussion
    Replies: 3
    Last Post: May 27th, 2015, 09:06 PM
  2. Unused IO Banks
    By russdx in forum FPGA, Hardcopy, and CPLD Discussion
    Replies: 14
    Last Post: January 23rd, 2012, 02:18 PM
  3. about unused pin state
    By violet701 in forum FPGA, Hardcopy, and CPLD Discussion
    Replies: 1
    Last Post: May 19th, 2011, 07:23 PM
  4. cyclone III unused inputs
    By kkoorndyk in forum Quartus II and EDA Tools Discussion
    Replies: 4
    Last Post: March 7th, 2011, 09:25 AM
  5. Clock inputs as general purpose inputs on Cyclone III?
    By baldur in forum FPGA, Hardcopy, and CPLD Discussion
    Replies: 1
    Last Post: January 14th, 2010, 07:23 PM

Bookmarks

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •