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Forum: General Altera Discussion

A place to discuss topics on general Altera products, applications and development

  1. Autogenerated altshift taps

    Started by phd.taha, May 17th, 2018 10:33 AM
    2 Pages
    1 2
    • Replies: 10
    • Views: 366
    Yesterday, 12:43 AM Go to last post
  2. How can I activate these IP in QSys?

    Started by zhangzq71, May 17th, 2018 08:52 PM
    • Replies: 8
    • Views: 225
    May 19th, 2018, 04:02 PM Go to last post
  3. Question Pl-usb-blaster-rcn

    Started by Nagen, May 18th, 2018 12:29 AM
    • Replies: 1
    • Views: 163
    May 18th, 2018, 07:40 AM Go to last post
    • Replies: 4
    • Views: 33,786
    May 18th, 2018, 06:07 AM Go to last post
  4. Accessing UART JTAG programmatically

    Started by vprisbud, May 17th, 2018 02:54 AM
    • Replies: 2
    • Views: 174
    May 17th, 2018, 09:21 PM Go to last post
  5. create_generated_clock on multiple signals

    Started by sirCodyLaGrone, May 14th, 2018 03:00 PM
    • Replies: 2
    • Views: 281
    May 17th, 2018, 11:53 AM Go to last post
  6. EPCQ replacing EPCS128

    Started by rbatfmi, May 17th, 2018 09:16 AM
    epcq, epcs
    • Replies: 0
    • Views: 148
    May 17th, 2018, 09:16 AM Go to last post
    • Replies: 0
    • Views: 126
    May 17th, 2018, 08:30 AM Go to last post
  7. Access SDRAM in Altera DE2 Board

    Started by Fofeu, May 17th, 2018 07:45 AM
    • Replies: 0
    • Views: 133
    May 17th, 2018, 07:45 AM Go to last post
  8. Single Event Upset

    Started by Alperr, May 10th, 2018 09:43 PM
    cyclone v, seu, single event upset
    • Replies: 1
    • Views: 233
    May 16th, 2018, 11:44 PM Go to last post
  9. How to Verify the authenticity of the Altera Parts?

    Started by SDcorp, September 20th, 2010 08:27 PM
    • Replies: 1
    • Views: 28,388
    May 16th, 2018, 10:39 PM Go to last post
  10. DDR3SDRAM IP-core, number of chip selects

    Started by akira, May 13th, 2018 11:04 PM
    • Replies: 7
    • Views: 363
    May 16th, 2018, 12:51 PM Go to last post
  11. Cyclone V ASx4 configuration

    Started by PierreFLt, May 4th, 2018 06:20 AM
    • Replies: 1
    • Views: 298
    May 15th, 2018, 11:57 PM Go to last post
  12. Trouble in Flashing to eMMC using USB blaster

    Started by ambika, May 14th, 2018 06:11 AM
    arria10, emmc, flashing, jtag, usb-blaster
    • Replies: 0
    • Views: 201
    May 14th, 2018, 06:11 AM Go to last post
    • Replies: 0
    • Views: 172
    May 13th, 2018, 11:38 PM Go to last post
  13. Problem of using Altera Avalon-MM Master Template

    Started by alex-huang, April 15th, 2018 09:21 PM
    • Replies: 1
    • Views: 322
    May 13th, 2018, 11:31 PM Go to last post
  14. power harmonic measurement

    Started by crazyfashion, May 12th, 2018 03:30 AM
    • Replies: 1
    • Views: 235
    May 13th, 2018, 08:03 PM Go to last post
  15. Post starting code

    Started by traymond, May 13th, 2018 02:15 PM
    • Replies: 1
    • Views: 207
    May 13th, 2018, 06:25 PM Go to last post
  16. CPU Design

    Started by thanhhy03, May 11th, 2018 07:44 AM
    • Replies: 3
    • Views: 272
    May 12th, 2018, 12:53 AM Go to last post
  17. Avalon ST BFM Excessive Memory Usage

    Started by aghoras, May 11th, 2018 08:07 AM
    avalon st bfm, memory usage
    • Replies: 0
    • Views: 176
    May 11th, 2018, 08:07 AM Go to last post
  18. Quartus 2 and .LVDS

    Started by drewphysics, May 5th, 2018 11:38 AM
    • Replies: 5
    • Views: 473
    May 11th, 2018, 08:03 AM Go to last post
  19. Asynchronous input strobe detection

    Started by mfbm, May 11th, 2018 12:07 AM
    • Replies: 2
    • Views: 254
    May 11th, 2018, 03:54 AM Go to last post
  20. Some questions about intel HLS RTL design.

    Started by Kevin Ryu, May 6th, 2018 05:24 PM
    • Replies: 3
    • Views: 443
    May 11th, 2018, 12:26 AM Go to last post
  21. Quartus II- exercise. HELP !

    Started by janemba, May 10th, 2018 07:33 AM
    • Replies: 1
    • Views: 242
    May 10th, 2018, 01:58 PM Go to last post
    • Replies: 2
    • Views: 247
    May 9th, 2018, 03:06 PM Go to last post
  22. Cfi S29al032d

    Started by ukandar, February 21st, 2009 04:19 PM
    • Replies: 2
    • Views: 47,803
    May 9th, 2018, 05:10 AM Go to last post
  23. Arria 10 TSE with GXB

    Started by peter.chang, May 9th, 2018 01:21 AM
    • Replies: 0
    • Views: 210
    May 9th, 2018, 01:21 AM Go to last post
  24. FPGA Cyclone V

    Started by kaka, May 8th, 2018 09:41 AM
    • Replies: 2
    • Views: 334
    May 8th, 2018, 04:58 PM Go to last post
  25. Issues with changing to a larger memory CPLD

    Started by prelude123, May 8th, 2018 07:06 AM
    • Replies: 1
    • Views: 275
    May 8th, 2018, 04:56 PM Go to last post
  26. Handling generic parameters in Quartus II 16.1 VHDL

    Started by alterry000, May 8th, 2018 12:15 AM
    • Replies: 5
    • Views: 398
    May 8th, 2018, 10:22 AM Go to last post

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