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Forum: DSP Builder and DSP IPs

A place to discuss topics related to DSP Builder and DSP IP cores

  1. How to improve timing in FIR Compiler II?

    Started by Kippis, April 27th, 2017 05:27 AM
    • Replies: 1
    • Views: 1,442
    October 19th, 2017, 01:07 AM Go to last post
  2. Multiply Accumulate in dsp builder advanced blocksets

    Started by VKT_ZN, August 2nd, 2017 06:04 AM
    • Replies: 1
    • Views: 833
    October 19th, 2017, 12:37 AM Go to last post
  3. FFT Megacore sink_ready never goes to 1

    Started by winter1894, January 7th, 2016 07:25 PM
    • Replies: 3
    • Views: 1,880
    October 19th, 2017, 12:25 AM Go to last post
  4. Lightbulb Altera FIR Compiler II 15.0 Coefficients Reload Issues

    Started by TCWORLD, July 12th, 2017 03:41 PM
    bug, fir
    • Replies: 0
    • Views: 836
    July 12th, 2017, 03:41 PM Go to last post
  5. ALtera FFT Outputs in SignalTapII

    Started by new_user, May 17th, 2017 01:12 PM
    • Replies: 1
    • Views: 1,724
    May 18th, 2017, 06:35 AM Go to last post
    • Replies: 1
    • Views: 1,647
    April 20th, 2017, 11:15 PM Go to last post
    • Replies: 1
    • Views: 1,288
    April 20th, 2017, 02:12 AM Go to last post
  6. Hardware In The Loop

    Started by sirbabak, April 18th, 2017 05:14 AM
    dsp builer, fil, hil, sil
    • Replies: 1
    • Views: 1,245
    April 19th, 2017, 06:09 AM Go to last post
  7. Arria V Gx development kit RF

    Started by Samantha, March 31st, 2017 09:32 PM
    • Replies: 0
    • Views: 1,369
    March 31st, 2017, 09:32 PM Go to last post
  8. FFT Megafunction v12.0 issues

    Started by roger8144, March 15th, 2017 07:38 AM
    • Replies: 4
    • Views: 2,313
    March 15th, 2017, 11:00 AM Go to last post
  9. Exclamation MegaCore Function Generation Error

    Started by weikunhou, November 15th, 2016 12:12 PM
    • Replies: 1
    • Views: 2,064
    March 7th, 2017, 11:32 AM Go to last post
  10. CIC Megacore Function

    Started by arianerafael, March 3rd, 2017 11:02 AM
    • Replies: 0
    • Views: 1,371
    March 3rd, 2017, 11:02 AM Go to last post
  11. Clock_Derivered Bock Problem

    Started by arianerafael, December 16th, 2016 05:23 AM
    • Replies: 1
    • Views: 1,690
    March 3rd, 2017, 07:23 AM Go to last post
    • Replies: 7
    • Views: 2,407
    February 22nd, 2017, 01:59 AM Go to last post
  12. Precise sampling rate and decimation

    Started by neurotek1, February 21st, 2017 01:07 PM
    • Replies: 3
    • Views: 2,115
    February 21st, 2017, 11:49 PM Go to last post
    • Replies: 1
    • Views: 1,857
    February 11th, 2017, 03:16 AM Go to last post
  13. Resource usage for Arria 10 DSP performing Multiply Add

    Started by boddis, January 20th, 2017 04:43 AM
    • Replies: 1
    • Views: 1,712
    January 20th, 2017, 04:55 AM Go to last post
  14. create custom component

    Started by sirbabak, January 9th, 2017 05:33 AM
    • Replies: 0
    • Views: 1,481
    January 9th, 2017, 05:33 AM Go to last post
    • Replies: 1
    • Views: 1,913
    January 3rd, 2017, 07:30 AM Go to last post
  15. FFT MegaCore 13.0 Generation Stuck

    Started by roger8144, December 8th, 2016 06:16 AM
    • Replies: 5
    • Views: 2,980
    December 29th, 2016, 03:00 AM Go to last post
  16. Quartus II Web Edition and Altera IP

    Started by Palmen, June 7th, 2012 02:27 AM
    • Replies: 4
    • Views: 39,547
    December 29th, 2016, 02:54 AM Go to last post
  17. FFT MegaCore RAM allocation

    Started by roger8144, December 21st, 2016 01:06 PM
    • Replies: 0
    • Views: 1,567
    December 21st, 2016, 01:06 PM Go to last post
  18. Real time FIR filtering MAX 10 FPGA Development Board

    Started by tan28, November 4th, 2016 08:02 AM
    • Replies: 7
    • Views: 3,151
    November 4th, 2016, 10:23 AM Go to last post
  19. viterbi IP core problem

    Started by yhaokai, October 26th, 2016 06:43 AM
    • Replies: 0
    • Views: 1,478
    October 26th, 2016, 06:43 AM Go to last post
  20. QSYS FFT 16.0 issue

    Started by samuel.lehner.proceq, October 18th, 2016 12:58 AM
    • Replies: 1
    • Views: 2,061
    October 21st, 2016, 05:37 AM Go to last post
  21. Issue with CIC filter implementation using DSP builder.

    Started by swarnava9, September 12th, 2016 09:43 AM
    • Replies: 8
    • Views: 3,869
    September 13th, 2016, 02:11 PM Go to last post
  22. Black Box and SIMULINK Model

    Started by shauk, September 1st, 2016 11:26 PM
    • Replies: 0
    • Views: 2,060
    September 1st, 2016, 11:26 PM Go to last post
  23. fft in Altera fixed point vs block floating point

    Started by mag_bag, August 31st, 2016 12:01 PM
    • Replies: 1
    • Views: 2,231
    August 31st, 2016, 01:49 PM Go to last post
  24. VIP mixer II stalls

    Started by kkahler, August 30th, 2016 08:01 AM
    mixer ii, vip
    • Replies: 0
    • Views: 1,770
    August 30th, 2016, 08:01 AM Go to last post
    • Replies: 2
    • Views: 3,716
    August 29th, 2016, 03:04 AM Go to last post

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