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Forum: FPGA, Hardcopy, and CPLD Discussion

A place to discuss topics related to Altera's FPGA, CPLD, Hardcopy, and transceiver products (e.g. MAX, Stratix , Cyclone , GX, Hardcopy)

  1. Question MAX-10: IP core for UFM

    Started by SMS, June 10th, 2018 11:50 PM
    2 Pages
    1 2
    • Replies: 10
    • Views: 395
    Today, 06:54 AM Go to last post
  2. How to design ALM for Aria 10?

    Started by g_tushar, June 18th, 2018 04:26 PM
    • Replies: 2
    • Views: 189
    Today, 06:43 AM Go to last post
    • Replies: 0
    • Views: 2
    Today, 06:33 AM Go to last post
  3. Data Transfer from FPGA-to-HPS

    Started by andrew44, June 12th, 2018 11:54 AM
    2 Pages
    1 2
    • Replies: 15
    • Views: 667
    Today, 05:40 AM Go to last post
  4. Maximum inputs per LAB

    Started by eugenek, Yesterday 03:18 AM
    • Replies: 9
    • Views: 170
    Today, 01:45 AM Go to last post
  5. Unable to Flash EPCQ32A via SFL IP

    Started by theguenni, Today 01:28 AM
    • Replies: 0
    • Views: 10
    Today, 01:28 AM Go to last post
  6. Reg., DPCLK pins in MAX 10 FPGA

    Started by Thulasi11106, Today 12:48 AM
    • Replies: 0
    • Views: 43
    Today, 12:48 AM Go to last post
  7. nStatus held low Cyclone IV EP4CE6E22

    Started by Labo_elec, June 18th, 2018 12:24 AM
    • Replies: 4
    • Views: 224
    Today, 12:47 AM Go to last post
    • Replies: 1
    • Views: 55
    Today, 12:10 AM Go to last post
  8. Post sdo file not generated in altera

    Started by shyamk, Yesterday 02:46 AM
    • Replies: 2
    • Views: 106
    Yesterday, 11:37 PM Go to last post
  9. Can I configure Cyclone V GT from Parallel Flash?

    Started by shy@navatek.com, June 13th, 2018 08:46 PM
    • Replies: 1
    • Views: 175
    Yesterday, 11:29 PM Go to last post
  10. What is Altera postion about USB Blaster Clones?

    Started by luisf.rossi, April 11th, 2013 08:27 PM
    • Replies: 7
    • Views: 37,127
    Yesterday, 11:04 PM Go to last post
  11. HMC pins in the CycloneV

    Started by serg1976, Yesterday 10:06 AM
    • Replies: 1
    • Views: 108
    Yesterday, 06:25 PM Go to last post
  12. PFL can not program my FLASH

    Started by xinbingma, May 17th, 2014 08:57 PM
    pfl
    • Replies: 1
    • Views: 14,382
    Yesterday, 11:18 AM Go to last post
  13. About path delay in my FPGA

    Started by pan307398668, June 18th, 2018 07:38 PM
    path delay
    • Replies: 2
    • Views: 181
    Yesterday, 03:39 AM Go to last post
  14. cyglone 5 gt interface for ads5263

    Started by thieulam, June 15th, 2016 02:28 AM
    • Replies: 4
    • Views: 1,316
    Yesterday, 12:53 AM Go to last post
  15. Spectrum analyzer

    Started by espanyola, June 16th, 2018 05:42 AM
    • Replies: 1
    • Views: 198
    June 19th, 2018, 05:55 PM Go to last post
    • Replies: 0
    • Views: 91
    June 19th, 2018, 05:21 PM Go to last post
    • Replies: 0
    • Views: 116
    June 19th, 2018, 10:30 AM Go to last post
    • Replies: 7
    • Views: 356
    June 19th, 2018, 06:05 AM Go to last post
  16. Interface SD Card through GPIO on DE0-Nano

    Started by macoskey, June 15th, 2018 12:24 PM
    cyclone iv, de0-nano, raspberry pi, sd card
    • Replies: 3
    • Views: 240
    June 19th, 2018, 05:01 AM Go to last post
    • Replies: 1
    • Views: 167
    June 19th, 2018, 04:01 AM Go to last post
  17. EPCS4SI8N bonding diagram

    Started by smithhk, June 19th, 2018 01:19 AM
    • Replies: 0
    • Views: 130
    June 19th, 2018, 01:19 AM Go to last post
  18. Problem with Max 10 I've never seen before

    Started by ddavidd, June 18th, 2018 03:37 PM
    • Replies: 1
    • Views: 159
    June 18th, 2018, 05:22 PM Go to last post
  19. Cyclone IV EP4CE10E22 circuit examples

    Started by clros, June 17th, 2018 04:55 AM
    • Replies: 1
    • Views: 188
    June 18th, 2018, 09:13 AM Go to last post
  20. max10 - external reset

    Started by Mux, June 17th, 2018 09:39 PM
    max10 reset
    • Replies: 0
    • Views: 141
    June 17th, 2018, 09:39 PM Go to last post
  21. Implementing a Large RAM on Cyclone II - is it possible?

    Started by dan11, June 16th, 2018 01:07 PM
    cyclone ii; ram
    • Replies: 4
    • Views: 228
    June 17th, 2018, 02:03 PM Go to last post
  22. Cyclone IV FPGA (EP4CE10E22) circuit

    Started by clros, June 17th, 2018 05:17 AM
    • Replies: 0
    • Views: 193
    June 17th, 2018, 05:17 AM Go to last post
  23. Max10 Jtag pins as Differential I/O.

    Started by Kozha, June 10th, 2018 12:36 AM
    • Replies: 4
    • Views: 388
    June 17th, 2018, 04:46 AM Go to last post
  24. 5AGXFB3H4F35C5NES device support

    Started by PonyoWoo, June 15th, 2018 08:53 AM
    arria v, arria v gx, arria v gx starter kit, device support
    • Replies: 1
    • Views: 187
    June 16th, 2018, 06:09 PM Go to last post

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