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Forum: Quartus II and EDA Tools Discussion

A place to discuss topics related to Altera's development tool as well as 3rd Party EDA tools for synthesis and simulation

  1. place only option

    Started by aashlesha94, Yesterday 10:00 AM
    • Replies: 0
    • Views: 41
    Yesterday, 10:00 AM Go to last post
  2. TimeQuest GUI takes long time when reading .sdc

    Started by vlrean, May 19th, 2017 06:20 AM
    • Replies: 4
    • Views: 513
    Yesterday, 07:49 AM Go to last post
    • Replies: 1
    • Views: 87
    June 22nd, 2017, 01:15 PM Go to last post
  3. TimeQuest / DE1-SoC Design Contraint File

    Started by martin-91x, June 22nd, 2017 04:11 AM
    • Replies: 2
    • Views: 106
    June 22nd, 2017, 07:27 AM Go to last post
  4. TimeQuest / DE1-SoC Design Contraint File

    Started by martin-91x, June 22nd, 2017 07:24 AM
    • Replies: 1
    • Views: 62
    June 22nd, 2017, 07:26 AM Go to last post
    • Replies: 0
    • Views: 31
    June 21st, 2017, 09:24 AM Go to last post
    • Replies: 3
    • Views: 1,186
    June 21st, 2017, 04:31 AM Go to last post
  5. Vector waveform file and timing simulation resolution

    Started by Activebits, June 21st, 2017 04:31 AM
    • Replies: 0
    • Views: 81
    June 21st, 2017, 04:31 AM Go to last post
  6. matrix array from instantiations

    Started by nizdom, June 21st, 2017 02:00 AM
    • Replies: 1
    • Views: 110
    June 21st, 2017, 03:28 AM Go to last post
  7. Question [Quartus] Organize project files in folders

    Started by avben, June 13th, 2017 07:59 AM
    quartus project
    • Replies: 3
    • Views: 319
    June 20th, 2017, 12:22 AM Go to last post
  8. USB Blaster II not recognized in CentOS 7

    Started by henriqa, April 27th, 2017 09:45 AM
    centos, linux, usb blaster
    • Replies: 3
    • Views: 658
    June 19th, 2017, 08:03 AM Go to last post
  9. No hardware in quartus programmer

    Started by ricardoluz, January 30th, 2017 03:22 AM
    blaster, issues, quartus, windows 10
    • Replies: 7
    • Views: 994
    June 19th, 2017, 12:38 AM Go to last post
  10. How to speedup the compilation of Quartus II

    Started by Haoxinyu, June 16th, 2017 11:35 PM
    • Replies: 5
    • Views: 380
    June 17th, 2017, 01:29 PM Go to last post
  11. Single multiplier takes up a whole DSP block for

    Started by shaiko, June 9th, 2017 01:22 PM
    • Replies: 3
    • Views: 464
    June 15th, 2017, 12:49 AM Go to last post
  12. VHDL inout port in gate-level simulation

    Started by maxvenum, June 13th, 2017 03:15 PM
    • Replies: 4
    • Views: 283
    June 14th, 2017, 12:10 PM Go to last post
  13. DDR same edge transfers VS opposite edge transfers

    Started by vlrean, June 14th, 2017 05:38 AM
    • Replies: 2
    • Views: 223
    June 14th, 2017, 10:40 AM Go to last post
    • Replies: 0
    • Views: 205
    June 12th, 2017, 04:20 AM Go to last post
  14. Random results in timing closure

    Started by pieter3d, June 11th, 2017 09:32 PM
    • Replies: 3
    • Views: 314
    June 12th, 2017, 01:07 AM Go to last post
  15. Question Error (12006): Node instance

    Started by kris222, June 11th, 2017 09:02 AM
    • Replies: 2
    • Views: 239
    June 11th, 2017, 11:26 PM Go to last post
    • Replies: 0
    • Views: 237
    June 11th, 2017, 12:39 AM Go to last post
  16. [Quartus] RTL viewer logic gates

    Started by avben, June 7th, 2017 12:59 PM
    • Replies: 3
    • Views: 439
    June 9th, 2017, 11:11 PM Go to last post
  17. Quartus Hardware and Software IP Patches

    Started by bclodfelter_pc, June 2nd, 2017 07:27 AM
    • Replies: 3
    • Views: 472
    June 9th, 2017, 02:17 PM Go to last post
    • Replies: 4
    • Views: 564
    June 9th, 2017, 02:14 PM Go to last post
  18. can't launch the synplify software

    Started by another_one, June 9th, 2017 08:25 AM
    • Replies: 0
    • Views: 236
    June 9th, 2017, 08:25 AM Go to last post
  19. Smile Library auk_dspip_lib not found. thanks

    Started by rf_mw, April 15th, 2011 02:16 AM
    • Replies: 4
    • Views: 39,544
    June 8th, 2017, 08:23 PM Go to last post
  20. Thumbs down Error during QSYS generation

    Started by gbieszczad, May 24th, 2017 01:59 AM
    altmemphy, bug, ddr2, qsys
    • Replies: 4
    • Views: 588
    June 8th, 2017, 03:00 AM Go to last post
  21. Question Powerplay Result

    Started by Haoxinyu, May 24th, 2017 07:37 PM
    • Replies: 3
    • Views: 584
    June 7th, 2017, 03:00 PM Go to last post
  22. Error during generating simulation code in Qsys

    Started by kelayamatoz, May 26th, 2017 03:24 PM
    • Replies: 1
    • Views: 418
    June 7th, 2017, 02:53 PM Go to last post
  23. [ModelSim] How to set support to VHDL-2011 ?

    Started by dmitryl, July 19th, 2015 11:28 PM
    • Replies: 8
    • Views: 2,114
    June 3rd, 2017, 02:08 AM Go to last post
  24. Qsys HPS(Hard Processor Ssystem) Errors

    Started by user456, May 21st, 2017 03:12 PM
    • Replies: 5
    • Views: 734
    June 2nd, 2017, 04:51 PM Go to last post

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