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Forum: Quartus II and EDA Tools Discussion

A place to discuss topics related to Altera's development tool as well as 3rd Party EDA tools for synthesis and simulation

    • Replies: 0
    • Views: 34
    Yesterday, 05:54 PM Go to last post
  1. RS232 UART not generated correctly in Quartus 17.0

    Started by corestar, May 27th, 2017 06:49 PM
    • Replies: 0
    • Views: 72
    May 27th, 2017, 06:49 PM Go to last post
  2. Error during generating simulation code in Qsys

    Started by kelayamatoz, May 26th, 2017 03:24 PM
    • Replies: 0
    • Views: 78
    May 26th, 2017, 03:24 PM Go to last post
  3. Create pof for EPC16 in Quartus 13.0sp1

    Started by rchavez, May 18th, 2017 09:48 AM
    • Replies: 1
    • Views: 218
    May 26th, 2017, 08:14 AM Go to last post
    • Replies: 5
    • Views: 193
    May 26th, 2017, 08:08 AM Go to last post
  4. SDC File for Multi rate Filter

    Started by shauk, May 26th, 2017 02:37 AM
    sdc, timing constrains
    • Replies: 2
    • Views: 121
    May 26th, 2017, 05:13 AM Go to last post
  5. Question Powerplay Result

    Started by Haoxinyu, May 24th, 2017 07:37 PM
    • Replies: 1
    • Views: 137
    May 25th, 2017, 10:03 PM Go to last post
  6. SPI Flash Timing Constraints

    Started by skrasms, May 18th, 2017 09:12 PM
    • Replies: 1
    • Views: 194
    May 25th, 2017, 07:54 PM Go to last post
    • Replies: 0
    • Views: 93
    May 25th, 2017, 12:17 PM Go to last post
  7. Thumbs down Error during QSYS generation

    Started by gbieszczad, May 24th, 2017 01:59 AM
    altmemphy, bug, ddr2, qsys
    • Replies: 2
    • Views: 157
    May 25th, 2017, 12:55 AM Go to last post
  8. IP Parameter Editor not selectable

    Started by rdb9879, May 22nd, 2017 12:10 PM
    • Replies: 6
    • Views: 212
    May 24th, 2017, 02:03 PM Go to last post
    • Replies: 2
    • Views: 152
    May 24th, 2017, 09:13 AM Go to last post
    • Replies: 2
    • Views: 125
    May 24th, 2017, 06:49 AM Go to last post
  9. HYPER_RETIMER Error

    Started by Ak_M, May 19th, 2017 01:26 AM
    • Replies: 6
    • Views: 316
    May 24th, 2017, 03:20 AM Go to last post
  10. Question Cannot use "Direct Download" for Quartus Lite v17?

    Started by Rodo, May 19th, 2017 09:39 AM
    • Replies: 4
    • Views: 281
    May 23rd, 2017, 01:56 PM Go to last post
  11. errors in qsys migrating from quartus 15.1 to 16.0

    Started by bar_00, May 19th, 2017 08:58 AM
    qsys error
    • Replies: 4
    • Views: 280
    May 23rd, 2017, 04:50 AM Go to last post
  12. Qsys HPS(Hard Processor Ssystem) Errors

    Started by user456, May 21st, 2017 03:12 PM
    • Replies: 4
    • Views: 196
    May 22nd, 2017, 04:09 PM Go to last post
  13. TimeQuest GUI takes long time when reading .sdc

    Started by vlrean, May 19th, 2017 06:20 AM
    • Replies: 2
    • Views: 214
    May 22nd, 2017, 07:44 AM Go to last post
    • Replies: 6
    • Views: 572
    May 22nd, 2017, 07:43 AM Go to last post
  14. Question Regenerate All Cores in Quartus

    Started by kevincheng88, November 9th, 2013 07:00 AM
    cores quartus tcl
    • Replies: 3
    • Views: 20,136
    May 22nd, 2017, 04:16 AM Go to last post
  15. (very) novice question of Quartus Prime Lite

    Started by NewbieFPGA, May 17th, 2017 01:54 AM
    • Replies: 3
    • Views: 258
    May 19th, 2017, 11:14 AM Go to last post
    • Replies: 1
    • Views: 210
    May 19th, 2017, 11:10 AM Go to last post
    • Replies: 3
    • Views: 215
    May 19th, 2017, 08:55 AM Go to last post
    • Replies: 5
    • Views: 408
    May 19th, 2017, 02:12 AM Go to last post
  16. Timing Violations workaround strategy

    Started by Pavel_47, April 13th, 2017 11:08 AM
    4 Pages
    1 2 3 ... 4
    • Replies: 39
    • Views: 2,967
    May 19th, 2017, 12:41 AM Go to last post
  17. Question Q:Dynamic PowerAnalysis

    Started by Haoxinyu, May 18th, 2017 07:22 PM
    powerplay; dapbuilder
    • Replies: 0
    • Views: 174
    May 18th, 2017, 07:22 PM Go to last post
    • Replies: 0
    • Views: 145
    May 18th, 2017, 03:57 AM Go to last post
    • Replies: 2
    • Views: 1,305
    May 17th, 2017, 07:33 AM Go to last post
  18. how to create matrix in VHDL

    Started by nizdom, May 15th, 2017 07:29 AM
    • Replies: 4
    • Views: 328
    May 16th, 2017, 02:44 AM Go to last post
  19. Quartus 17 JBC Files & STAPL Player @ MAX10

    Started by tiano, May 16th, 2017 12:22 AM
    jam jbc stapl
    • Replies: 0
    • Views: 199
    May 16th, 2017, 12:22 AM Go to last post

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