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Forum: Quartus II and EDA Tools Discussion

A place to discuss topics related to Altera's development tool as well as 3rd Party EDA tools for synthesis and simulation

    • Replies: 3
    • Views: 101
    Today, 07:08 AM Go to last post
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    • Views: 14
    Yesterday, 09:10 PM Go to last post
  1. HLS support in Lite and Standard versions

    Started by des333, Yesterday 11:39 AM
    • Replies: 1
    • Views: 56
    Yesterday, 07:02 PM Go to last post
  2. MAX 10 Development Kit

    Started by EduFer, Yesterday 03:33 PM
    • Replies: 0
    • Views: 51
    Yesterday, 03:33 PM Go to last post
  3. Connecting Problem of UniPHY DDR2 Megawizard Pins to FPGA Pins

    Started by ilghiz, February 15th, 2014 04:31 AM
    • Replies: 3
    • Views: 21,567
    Yesterday, 06:20 AM Go to last post
  4. how to build the example project form *.tcl file?

    Started by qd0090, February 23rd, 2018 05:17 PM
    • Replies: 1
    • Views: 87
    February 23rd, 2018, 05:30 PM Go to last post
  5. time limited sof file generation

    Started by smruthi, February 16th, 2018 06:02 AM
    • Replies: 5
    • Views: 297
    February 23rd, 2018, 12:34 AM Go to last post
    • Replies: 3
    • Views: 40,902
    February 22nd, 2018, 09:02 AM Go to last post
  6. IOPLL feedback delay chain

    Started by kais, February 22nd, 2018 01:13 AM
    • Replies: 0
    • Views: 110
    February 22nd, 2018, 01:13 AM Go to last post
    • Replies: 0
    • Views: 127
    February 21st, 2018, 02:40 AM Go to last post
  7. [CDC] How can I do Cross Domain Checks in Quartus?

    Started by dmitryl, February 15th, 2018 04:27 AM
    • Replies: 7
    • Views: 318
    February 20th, 2018, 05:34 PM Go to last post
  8. How to include a HPS with block symbol file

    Started by Electron84, September 2nd, 2017 06:59 AM
    block diagram, bsf, hps, soc, vhdl
    • Replies: 1
    • Views: 931
    February 20th, 2018, 02:59 PM Go to last post
  9. Fails trying to install Quartus prime on ARCH LINUX

    Started by Sixtenson, February 12th, 2018 12:51 AM
    • Replies: 2
    • Views: 207
    February 20th, 2018, 02:43 PM Go to last post
  10. Smile Quartus failed to run inside Docker (Linux)

    Started by FPGA, September 7th, 2017 12:24 AM
    • Replies: 3
    • Views: 1,004
    February 20th, 2018, 10:38 AM Go to last post
  11. Can't (properly) install Prime Lite 17.1.0.590

    Started by jcw, November 27th, 2017 12:04 PM
    • Replies: 2
    • Views: 809
    February 20th, 2018, 10:23 AM Go to last post
  12. Exclamation Altera Support / How to file a bug report about Quartus?

    Started by jonathanjo, February 20th, 2018 10:09 AM
    altera, bug, quartus
    • Replies: 0
    • Views: 109
    February 20th, 2018, 10:09 AM Go to last post
  13. Post Critical warning about asynchronous clock domains from same PLL

    Started by mps, February 15th, 2018 11:12 PM
    2 Pages
    1 2
    • Replies: 15
    • Views: 472
    February 19th, 2018, 06:44 AM Go to last post
  14. C9555E: ARM DS-5 Failed to check out an (existing) license.

    Started by Johi, February 17th, 2018 12:03 PM
    • Replies: 1
    • Views: 189
    February 18th, 2018, 01:51 AM Go to last post
    • Replies: 2
    • Views: 255
    February 16th, 2018, 05:23 PM Go to last post
  15. [SDC] Input/Output delay for All ports -> script writing

    Started by dmitryl, January 5th, 2018 10:49 AM
    3 Pages
    1 2 3
    • Replies: 25
    • Views: 1,605
    February 16th, 2018, 12:53 PM Go to last post
  16. CDC -> how to check missed synchronized?

    Started by dmitryl, February 15th, 2018 11:35 AM
    • Replies: 1
    • Views: 198
    February 16th, 2018, 03:52 AM Go to last post
  17. Quartus II Version & Build Numbers

    Started by Elwynh, February 15th, 2018 06:50 AM
    • Replies: 3
    • Views: 241
    February 16th, 2018, 02:29 AM Go to last post
  18. Adapter for converting Avalon-MM data to Avalon-ST data

    Started by bhargavmr, July 23rd, 2012 04:44 AM
    • Replies: 4
    • Views: 34,078
    February 16th, 2018, 02:24 AM Go to last post
  19. [TCL] collections -> some questions

    Started by dmitryl, February 14th, 2018 12:32 PM
    • Replies: 1
    • Views: 156
    February 15th, 2018, 05:01 AM Go to last post
  20. Signal Tap II Terasic Blaster Compatibility

    Started by baylon, February 14th, 2018 08:09 AM
    • Replies: 3
    • Views: 193
    February 15th, 2018, 03:29 AM Go to last post
  21. Unhappy Quartus II time limited .sof file

    Started by kidneta, February 19th, 2012 01:41 PM
    • Replies: 8
    • Views: 42,338
    February 15th, 2018, 12:47 AM Go to last post
    • Replies: 3
    • Views: 184
    February 14th, 2018, 03:18 PM Go to last post
  22. Lightbulb (vcom-1600) No feasible entries for subprogram

    Started by punno2015, February 9th, 2018 03:22 AM
    • Replies: 4
    • Views: 304
    February 14th, 2018, 09:09 AM Go to last post
  23. Quartus II Simulation Waveform Problem

    Started by ChinJQ, February 1st, 2018 04:16 AM
    • Replies: 8
    • Views: 776
    February 13th, 2018, 12:22 AM Go to last post
  24. Quartus Prime 17.1 with Intel HLS Compiler issues

    Started by zubeyr, February 12th, 2018 11:10 AM
    • Replies: 4
    • Views: 303
    February 12th, 2018, 10:54 PM Go to last post

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