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Forum: OpenCL

Forum to discuss Altera's OpenCL SDK

  1. Thumbs up Sticky Thread Sticky: Nallatech OpenCL BSPs - troubleshooter

    Started by gigi, September 30th, 2014 02:18 PM
    3 Pages
    1 2 3
    • Replies: 20
    • Views: 26,990
    April 26th, 2017, 07:32 AM Go to last post
  2. Sticky Thread Sticky: Readme!

    Started by BadOmen, January 28th, 2013 09:20 AM
    • Replies: 0
    • Views: 35,855
    January 28th, 2013, 09:20 AM Go to last post
    • Replies: 8
    • Views: 313
    May 25th, 2017, 06:42 PM Go to last post
  1. what happened about "ip-generate FAILED" ?

    Started by xbs665, January 12th, 2015 06:18 PM
    • Replies: 2
    • Views: 5,894
    May 25th, 2017, 01:47 PM Go to last post
  2. openCL example on yocto image on cyclone 5 SOC

    Started by nileshvora441, May 18th, 2017 10:23 PM
    linux, opencl, yocto
    • Replies: 4
    • Views: 268
    May 25th, 2017, 07:18 AM Go to last post
  3. Progress stops during compilation

    Started by dacueva, May 23rd, 2017 04:20 PM
    • Replies: 2
    • Views: 150
    May 25th, 2017, 06:40 AM Go to last post
  4. Logic utilization of hello-world vector add

    Started by TADRIAN, May 22nd, 2017 09:20 PM
    logicutilization, opencl, vectoradd
    • Replies: 5
    • Views: 205
    May 24th, 2017, 12:57 PM Go to last post
  5. Parallel kernel compilation on a single machine

    Started by sbiookag, May 18th, 2017 03:32 PM
    compilation, kernel, opencl
    • Replies: 3
    • Views: 205
    May 24th, 2017, 07:52 AM Go to last post
    • Replies: 0
    • Views: 78
    May 23rd, 2017, 03:00 PM Go to last post
    • Replies: 1
    • Views: 150
    May 22nd, 2017, 04:19 AM Go to last post
  6. Unhappy Trouble loading recompiled aclsoc-drv.ko

    Started by bmorcos, January 30th, 2017 06:18 AM
    driver, opencl, rte
    • Replies: 5
    • Views: 928
    May 18th, 2017, 10:59 PM Go to last post
  7. FFT / IFFT Example Inconsistency

    Started by fand, May 18th, 2017 10:01 AM
    • Replies: 2
    • Views: 218
    May 18th, 2017, 10:38 AM Go to last post
  8. Arrow Why do these other designs not fit?

    Started by atze, May 3rd, 2017 11:48 PM
    2 Pages
    1 2
    • Replies: 10
    • Views: 823
    May 18th, 2017, 04:56 AM Go to last post
  9. Unhappy Cannot find specific errors of kernel compilation

    Started by sbiookag, May 16th, 2017 06:57 AM
    • Replies: 5
    • Views: 323
    May 17th, 2017, 07:21 AM Go to last post
    • Replies: 9
    • Views: 447
    May 17th, 2017, 06:54 AM Go to last post
  10. Intel FPGA SDK for OpenCL Licensing

    Started by lkljucaric, May 12th, 2017 11:12 AM
    altera, fpga, license, opencl, sdk
    • Replies: 6
    • Views: 481
    May 16th, 2017, 09:06 AM Go to last post
  11. Problem compiling hello world on Windows

    Started by jlefley, October 31st, 2014 10:00 AM
    • Replies: 8
    • Views: 16,541
    May 15th, 2017, 03:29 PM Go to last post
  12. Sobel filter with opencl on FPGA

    Started by racexil, May 15th, 2017 12:29 AM
    fpga, opencl, opencl c
    • Replies: 0
    • Views: 200
    May 15th, 2017, 12:29 AM Go to last post
    • Replies: 5
    • Views: 413
    May 11th, 2017, 11:16 AM Go to last post
  13. Host build for Altera OpenCL with CMake files

    Started by as12413, May 11th, 2017 09:35 AM
    • Replies: 0
    • Views: 309
    May 11th, 2017, 09:35 AM Go to last post
    • Replies: 9
    • Views: 484
    May 11th, 2017, 01:04 AM Go to last post
  14. opencl library example

    Started by zh880813, May 10th, 2017 07:48 PM
    • Replies: 0
    • Views: 248
    May 10th, 2017, 07:48 PM Go to last post
  15. Why does one single load/store consume much RAMs?

    Started by seanchen1002, May 9th, 2017 03:33 PM
    external memory access, opencl, ram
    • Replies: 6
    • Views: 449
    May 10th, 2017, 05:42 PM Go to last post
  16. RTL Module Packaged into OpenCL Library

    Started by zh880813, May 10th, 2017 05:17 PM
    • Replies: 0
    • Views: 207
    May 10th, 2017, 05:17 PM Go to last post
  17. Question RTL Component for an OpenCL Library Example

    Started by mauriciopalavecino, July 4th, 2016 06:48 AM
    integration, opencl, rtl, verilog, vhdl
    • Replies: 3
    • Views: 1,146
    May 10th, 2017, 05:13 PM Go to last post
  18. OpenCL Library Design Example

    Started by zh880813, May 10th, 2017 02:08 AM
    • Replies: 0
    • Views: 230
    May 10th, 2017, 02:08 AM Go to last post
  19. Why OpenCL haver specific boards?

    Started by kangchusuk, May 7th, 2017 05:39 PM
    2 Pages
    1 2
    boards, opencl
    • Replies: 12
    • Views: 715
    May 9th, 2017, 09:59 PM Go to last post
    • Replies: 18
    • Views: 1,787
    May 5th, 2017, 01:33 AM Go to last post
  20. What does the "work item" stand for in FPGA?

    Started by douhaoexia, April 27th, 2017 10:53 PM
    opencl model
    • Replies: 5
    • Views: 662
    May 4th, 2017, 05:17 PM Go to last post
    • Replies: 1
    • Views: 276
    May 4th, 2017, 08:22 AM Go to last post
  21. Running de1soc Vector_add example on de5-net

    Started by masoud, April 26th, 2017 07:09 PM
    • Replies: 5
    • Views: 702
    May 2nd, 2017, 04:05 AM Go to last post
    • Replies: 7
    • Views: 601
    May 1st, 2017, 10:09 PM Go to last post

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