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Forum: SoC Discussion

A place to discuss topics related to Altera's SoC products and software for them

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  1. Discussion of all the SoC devices including FPGA and HPS interaction

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    • Threads: 507
    • Posts: 1,920
  2. A discussion on the Linux operating system for SoC devices

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    • Threads: 206
    • Posts: 544
  3. Links and forums for non-Linux operating systems that support Altera's SoC devices.

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    Forum Statistics:

    • Threads: 15
    • Posts: 42
  4. A place to discuss the hardware libraries of the SoC devices. The hardware libraries consist of the SoC abstraction layer and hardware manager.

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    Forum Statistics:

    • Threads: 69
    • Posts: 241
  5. A place to discuss booting SoC devices and the bootloader that makes this happen

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    Forum Statistics:

    • Threads: 82
    • Posts: 324
  1. Sticky Thread Sticky: Readme!

    Started by BadOmen, January 27th, 2015 11:29 AM
    • Replies: 0
    • Views: 10,334
    January 27th, 2015, 11:29 AM Go to last post
    • Replies: 2
    • Views: 1,627
    October 18th, 2017, 09:05 AM Go to last post
  1. Getting Error with DE0-nano-soc [making u-boot.img]

    Started by jongyun23, August 31st, 2017 10:24 PM
    • Replies: 2
    • Views: 466
    October 16th, 2017, 12:43 AM Go to last post
  2. Read DDR to file using HPS2FPGA

    Started by ela05jdc, September 8th, 2017 09:12 AM
    arrow, hps, hps2fpga, soc, sockit
    • Replies: 1
    • Views: 416
    October 16th, 2017, 12:33 AM Go to last post
  3. Question FPGA to SDRAM AXI Transfer

    Started by ariefgrand, October 6th, 2017 07:04 AM
    arria, axi, sdram
    • Replies: 2
    • Views: 367
    October 11th, 2017, 04:49 AM Go to last post
  4. Connect FFT IP core and QSYS

    Started by ezequiel, October 10th, 2017 03:53 AM
    • Replies: 0
    • Views: 188
    October 10th, 2017, 03:53 AM Go to last post
  5. Disable FPU on Arria10 SoC FPGA

    Started by karthik.k, August 28th, 2017 11:17 PM
    • Replies: 6
    • Views: 1,061
    October 8th, 2017, 02:15 AM Go to last post
  6. make_sdimage.py creates invalid ext3 partition

    Started by billr, December 13th, 2016 08:20 PM
    • Replies: 1
    • Views: 885
    September 27th, 2017, 02:12 AM Go to last post
  7. Question Linux Console with framebuffer on DE10-nano SOC

    Started by yazbek, September 24th, 2017 11:39 PM
    • Replies: 0
    • Views: 316
    September 24th, 2017, 11:39 PM Go to last post
  8. DE1-SoC Interfacing with ADXL345 3 Axis Accelerometer [I2C]

    Started by XXRyanXXL, September 14th, 2017 08:46 AM
    • Replies: 1
    • Views: 477
    September 23rd, 2017, 08:13 AM Go to last post
  9. Unhappy YoctoPlugin SoCKit Altera Cyclone 5

    Started by geogrebust, September 22nd, 2016 05:46 AM
    • Replies: 1
    • Views: 1,170
    September 15th, 2017, 06:47 AM Go to last post
    • Replies: 1
    • Views: 1,107
    September 7th, 2017, 12:38 PM Go to last post
    • Replies: 0
    • Views: 402
    September 7th, 2017, 12:24 PM Go to last post
    • Replies: 0
    • Views: 380
    August 31st, 2017, 10:20 PM Go to last post
  10. arria 10 jtag problem while using ds5

    Started by hl8316, August 23rd, 2017 06:30 PM
    • Replies: 2
    • Views: 603
    August 24th, 2017, 06:02 PM Go to last post
  11. Uart Baud Rate Drop

    Started by stefanri, August 17th, 2017 07:09 AM
    • Replies: 4
    • Views: 650
    August 22nd, 2017, 09:32 AM Go to last post
  12. SPI communication

    Started by seongjinkim, August 22nd, 2017 03:42 AM
    • Replies: 0
    • Views: 390
    August 22nd, 2017, 03:42 AM Go to last post
  13. Altera avalon I2C

    Started by kgandhi0408, August 18th, 2017 03:39 AM
    • Replies: 1
    • Views: 517
    August 18th, 2017, 09:03 PM Go to last post
  14. Fixed-link Feature

    Started by MartinFeng_Cytech, August 17th, 2017 12:23 AM
    • Replies: 0
    • Views: 404
    August 17th, 2017, 12:23 AM Go to last post
  15. Qsys Custom component Error

    Started by Marco Lobba, August 8th, 2017 07:29 AM
    • Replies: 2
    • Views: 703
    August 8th, 2017, 10:29 PM Go to last post
  16. Questions about SOC FPGA Preloader and device tree

    Started by OmranAbazid, May 23rd, 2017 02:40 PM
    • Replies: 9
    • Views: 2,303
    August 1st, 2017, 12:28 AM Go to last post
  17. Qsys Custom Peripheral Memory Mapping

    Started by FlipFlop, July 26th, 2017 08:53 PM
    custom peripheral, interrupt, nios, qsys
    • Replies: 2
    • Views: 691
    July 28th, 2017, 12:59 PM Go to last post
  18. Soc simulation in VHDL

    Started by romainht, July 27th, 2017 11:10 PM
    modelsim, vhdl
    • Replies: 2
    • Views: 617
    July 28th, 2017, 01:38 AM Go to last post
  19. Datails about DK-START-5AGXB3N

    Started by Pierre9258, July 26th, 2017 11:25 PM
    • Replies: 3
    • Views: 672
    July 28th, 2017, 01:13 AM Go to last post
  20. About USB memory

    Started by hwada, July 26th, 2017 05:49 PM
    • Replies: 0
    • Views: 487
    July 26th, 2017, 05:49 PM Go to last post
  21. Programming Cyclone V SoC FPGA from or preloader

    Started by Sam16, July 26th, 2017 05:33 AM
    arm, cyclone v, hps, soc
    • Replies: 1
    • Views: 625
    July 26th, 2017, 08:54 AM Go to last post
  22. Cyclone V SOC 256 bit F2S

    Started by shaiko, April 26th, 2017 01:13 PM
    • Replies: 7
    • Views: 2,361
    July 26th, 2017, 08:29 AM Go to last post
  23. Number of FPGA cores used in design

    Started by umutulutas, July 23rd, 2017 10:45 PM
    • Replies: 1
    • Views: 581
    July 24th, 2017, 11:58 AM Go to last post
    • Replies: 9
    • Views: 2,430
    July 20th, 2017, 08:29 AM Go to last post
  24. Getting access to HPS GPIO lines

    Started by rod@ariradesign.com, July 17th, 2017 04:02 PM
    • Replies: 3
    • Views: 794
    July 18th, 2017, 03:32 PM Go to last post
  25. RTL2832U Linux driver compilation on ARM

    Started by kaminari0x01, July 13th, 2017 03:29 PM
    • Replies: 0
    • Views: 551
    July 13th, 2017, 03:29 PM Go to last post

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