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Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 04:36 PM
    • Replies: 0
    • Views: 13,518
    October 14th, 2014, 04:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 03:37 PM
    • Replies: 0
    • Views: 32,620
    July 19th, 2013, 03:37 PM Go to last post
  1. 10AS066H2F34I1HG FIT and MTBF value

    Started by bhavishya aj, January 12th, 2018 10:02 PM
    • Replies: 4
    • Views: 256
    Today, 03:58 AM Go to last post
    • Replies: 4
    • Views: 798
    January 17th, 2018, 06:25 AM Go to last post
  2. about making de10-nano board preloader issue

    Started by chfanjiang, January 14th, 2018 05:26 AM
    • Replies: 0
    • Views: 129
    January 14th, 2018, 05:26 AM Go to last post
  3. about xml file: soc_system_board_info.xml

    Started by Nrekcah, January 9th, 2018 11:59 PM
    • Replies: 0
    • Views: 158
    January 9th, 2018, 11:59 PM Go to last post
  4. Cyclone V SoC Preloader will not run bare metal app

    Started by jwdonal, September 5th, 2017 01:52 AM
    • Replies: 8
    • Views: 2,488
    January 9th, 2018, 08:43 AM Go to last post
  5. Route HPS UART pins to FPGA pins DE0 nano SoC

    Started by daniel45675, October 2nd, 2016 03:47 PM
    de0 nano soc, fpga, hps, route, uart
    • Replies: 7
    • Views: 3,281
    January 5th, 2018, 04:03 PM Go to last post
  6. low speed on hps to fpga bridge

    Started by dipin555, December 23rd, 2017 07:12 AM
    • Replies: 1
    • Views: 474
    December 24th, 2017, 05:10 AM Go to last post
  7. HPS SPI slave

    Started by simonkbrown, December 14th, 2017 09:26 AM
    device tree, driver, hps, interrupts, spi
    • Replies: 0
    • Views: 472
    December 14th, 2017, 09:26 AM Go to last post
  8. HPS vs FPGA configuration

    Started by rod@ariradesign.com, November 20th, 2017 01:45 PM
    • Replies: 3
    • Views: 635
    December 14th, 2017, 02:50 AM Go to last post
  9. storing the values in hps coming from fpga

    Started by dipin555, December 11th, 2017 10:10 PM
    • Replies: 0
    • Views: 343
    December 11th, 2017, 10:10 PM Go to last post
  10. Question Qsys HPS SDRAM and peripheral connections

    Started by agg, December 11th, 2017 02:26 PM
    • Replies: 0
    • Views: 341
    December 11th, 2017, 02:26 PM Go to last post
  11. SoC programming other devices

    Started by Pencol, December 11th, 2017 12:03 AM
    • Replies: 0
    • Views: 346
    December 11th, 2017, 12:03 AM Go to last post
  12. sending 64 bit from fpga to hs to terminal in pc @10k

    Started by dipin555, October 24th, 2017 04:51 AM
    • Replies: 3
    • Views: 966
    December 9th, 2017, 07:35 AM Go to last post
  13. HPS peripherals discription

    Started by lamazavr, December 7th, 2017 02:39 AM
    hps, peripherals description
    • Replies: 3
    • Views: 570
    December 8th, 2017, 06:30 PM Go to last post
  14. Sopc2dts "Transparent bridge not yet supported" meaning?

    Started by wobbert, December 1st, 2017 02:41 AM
    • Replies: 1
    • Views: 542
    December 6th, 2017, 02:58 AM Go to last post
  15. ARM Training

    Started by joe306, December 4th, 2017 10:12 AM
    • Replies: 0
    • Views: 330
    December 4th, 2017, 10:12 AM Go to last post
  16. Question Write/Read RAM memory from FPGA.

    Started by skliarovartem, November 11th, 2017 06:16 PM
    incip_memory2
    • Replies: 5
    • Views: 1,144
    November 26th, 2017, 12:14 PM Go to last post
  17. Question issues in running CycV_SoC with DDR3 RAM on Dev_Kit

    Started by MrFreshman, August 8th, 2014 04:17 AM
    cyclone v, ddr3, hcm, quartus
    • Replies: 3
    • Views: 17,845
    November 23rd, 2017, 08:02 AM Go to last post
  18. Question Can one board support an Arria 10 GX *or* an Arria 10 SX?

    Started by bgrattan, November 20th, 2017 04:00 PM
    arria 10, migration
    • Replies: 2
    • Views: 486
    November 21st, 2017, 10:19 AM Go to last post
  19. using the hps phy via loanios from fpga (de10-nano-soc)

    Started by letrend, November 21st, 2017 07:53 AM
    • Replies: 0
    • Views: 414
    November 21st, 2017, 07:53 AM Go to last post
  20. sopc2dts gives dts with 64bit address.

    Started by megahraj.ag, November 14th, 2017 12:45 AM
    arria10, device tree
    • Replies: 0
    • Views: 505
    November 14th, 2017, 12:45 AM Go to last post
  21. DE10 pins not found

    Started by D@n, November 3rd, 2017 02:52 PM
    • Replies: 6
    • Views: 950
    November 8th, 2017, 05:01 PM Go to last post
  22. Can't load .jic file to EPCQ device.

    Started by krunal.gandhi, October 25th, 2017 03:15 AM
    • Replies: 2
    • Views: 900
    November 5th, 2017, 08:32 PM Go to last post
  23. sdram addressing troubles

    Started by adrenalin, November 1st, 2017 01:53 AM
    • Replies: 0
    • Views: 562
    November 1st, 2017, 01:53 AM Go to last post
  24. How to set up shared on-chip memory

    Started by sonicsmooth, August 3rd, 2017 10:33 AM
    • Replies: 2
    • Views: 1,198
    October 27th, 2017, 08:18 AM Go to last post
  25. Can HPS verify FPGA configuration?

    Started by mglapa, October 26th, 2017 05:18 PM
    • Replies: 1
    • Views: 649
    October 27th, 2017, 01:40 AM Go to last post
  26. Loading rbf file on boot from within Linux...

    Started by EauContraire, October 17th, 2017 04:28 AM
    • Replies: 0
    • Views: 671
    October 17th, 2017, 04:28 AM Go to last post
    • Replies: 3
    • Views: 1,148
    October 16th, 2017, 05:06 AM Go to last post
  27. Cyclone V SoC HPS2FPGA AXI Master - How to enable?

    Started by kstolp, September 12th, 2013 09:41 AM
    • Replies: 5
    • Views: 33,974
    October 15th, 2017, 08:43 PM Go to last post
  28. Cyclone V SoC DK: how to configure awprot/arprot of EMAC?

    Started by Aquu9, October 13th, 2017 08:30 AM
    • Replies: 0
    • Views: 459
    October 13th, 2017, 08:30 AM Go to last post

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