Page 1 of 17 12311 ... LastLast
Threads 1 to 30 of 504

Forum: SoC Device Discussion

Discussion of all the SoC devices including FPGA and HPS interaction

  1. Sticky Thread Sticky: SoC Dev Kit Quality of Experience Survey

    Started by BadOmen, October 14th, 2014 03:36 PM
    • Replies: 0
    • Views: 12,961
    October 14th, 2014, 03:36 PM Go to last post
  2. Sticky Thread Sticky: !!!! Read Me !!!!

    Started by BadOmen, July 19th, 2013 02:37 PM
    • Replies: 0
    • Views: 32,092
    July 19th, 2013, 02:37 PM Go to last post
    • Replies: 0
    • Views: 45
    Yesterday, 03:28 AM Go to last post
    • Replies: 3
    • Views: 316
    October 16th, 2017, 04:06 AM Go to last post
  1. Cyclone V SoC HPS2FPGA AXI Master - How to enable?

    Started by kstolp, September 12th, 2013 08:41 AM
    • Replies: 5
    • Views: 32,902
    October 15th, 2017, 07:43 PM Go to last post
  2. How to let FPGA get access to HPS pins

    Started by davidc85, March 27th, 2014 04:44 AM
    2 Pages
    1 2
    • Replies: 15
    • Views: 30,945
    September 29th, 2017, 09:16 AM Go to last post
  3. sdram DE0-nano - PLL phase shift

    Started by JeanValjean, September 27th, 2017 12:08 PM
    • Replies: 0
    • Views: 206
    September 27th, 2017, 12:08 PM Go to last post
  4. Does User clock frequency in QSYS for HPS-to-FPGA clock work?

    Started by mawillia, February 26th, 2014 04:31 AM
    • Replies: 2
    • Views: 18,964
    September 24th, 2017, 11:45 PM Go to last post
  5. Cyclone V SoC Preloader will not run bare metal app

    Started by jwdonal, September 5th, 2017 12:52 AM
    • Replies: 3
    • Views: 720
    September 6th, 2017, 06:20 PM Go to last post
  6. HPS - FPGA used inside block diagram file.

    Started by ruben.vinuela, March 18th, 2015 09:52 AM
    • Replies: 3
    • Views: 3,287
    September 2nd, 2017, 07:52 AM Go to last post
  7. DE1-SOC power button non-functioning in AS/EPCS mode

    Started by Micks, August 31st, 2017 05:24 AM
    active serial, de1-soc, epcs, power button
    • Replies: 0
    • Views: 380
    August 31st, 2017, 05:24 AM Go to last post
  8. preloader not loading u-boot image

    Started by merciyy, August 17th, 2017 05:43 PM
    baremetal, preloader, sdcard boot
    • Replies: 6
    • Views: 1,033
    August 22nd, 2017, 10:04 AM Go to last post
  9. Post D5M not working with DE1-SoC

    Started by mderryberry, September 16th, 2014 01:30 PM
    d5m, de1-soc, image processing, vga
    • Replies: 5
    • Views: 14,376
    August 16th, 2017, 08:24 PM Go to last post
  10. AXI Problem when simulating Cyclone 5 SOC in Cadence NCSim

    Started by andrewrp, August 11th, 2017 08:16 AM
    • Replies: 0
    • Views: 409
    August 11th, 2017, 08:16 AM Go to last post
  11. How to set up shared on-chip memory

    Started by sonicsmooth, August 3rd, 2017 09:33 AM
    • Replies: 0
    • Views: 492
    August 3rd, 2017, 09:33 AM Go to last post
  12. Custom Spi Interface controlled by HPS in Arria 10

    Started by Marco Lobba, July 25th, 2017 04:15 AM
    • Replies: 1
    • Views: 564
    August 1st, 2017, 12:46 AM Go to last post
  13. Shared HPS pins pin planning on Arria 10

    Started by Marco Lobba, July 27th, 2017 07:32 AM
    • Replies: 1
    • Views: 515
    July 27th, 2017, 07:31 PM Go to last post
  14. How to work with FPGA-to-HPS bridge

    Started by Sergey, July 24th, 2017 06:06 AM
    • Replies: 0
    • Views: 504
    July 24th, 2017, 06:06 AM Go to last post
  15. FPGA to HPS (AXI Slave) address range issue

    Started by aurash, July 19th, 2017 09:04 AM
    hps
    • Replies: 1
    • Views: 640
    July 19th, 2017, 05:03 PM Go to last post
  16. Seeking HSMC-Transceiver setup assistance for C5G Eval Board

    Started by Scei, July 17th, 2017 08:58 AM
    • Replies: 1
    • Views: 556
    July 19th, 2017, 09:45 AM Go to last post
  17. DE1-SoC problem with tree please HELP!!

    Started by juatafe, July 4th, 2017 01:32 AM
    • Replies: 5
    • Views: 1,403
    July 5th, 2017, 11:51 PM Go to last post
  18. Arria V SOC clock sources

    Started by arria_v_soc_user, August 12th, 2014 03:55 AM
    2 Pages
    1 2
    • Replies: 10
    • Views: 16,859
    July 5th, 2017, 10:14 AM Go to last post
  19. MAC Address changes on reboot

    Started by DaveHorne, January 21st, 2014 07:24 AM
    • Replies: 7
    • Views: 23,144
    June 19th, 2017, 11:23 AM Go to last post
  20. Question Routing of I2C0 pins on SoC

    Started by Luki B, December 22nd, 2016 12:10 AM
    i2c, qsys, routing, soc
    • Replies: 3
    • Views: 2,230
    June 14th, 2017, 12:39 AM Go to last post
  21. DE0-nano: JTAG breaks when loading from EPCS

    Started by ISE_benny, June 7th, 2017 06:54 AM
    • Replies: 0
    • Views: 652
    June 7th, 2017, 06:54 AM Go to last post
  22. Cyclone V, HPS SPI routing to FPGA pins

    Started by Captain-Chaos, January 13th, 2017 01:35 AM
    • Replies: 3
    • Views: 2,623
    May 29th, 2017, 01:36 AM Go to last post
  23. Configuring IO on Cyclone V after boot

    Started by larso, May 10th, 2017 12:55 PM
    • Replies: 0
    • Views: 1,055
    May 10th, 2017, 12:55 PM Go to last post
  24. High bandwidth data transfer between hps and fpga

    Started by mojcmos, September 8th, 2016 03:50 AM
    3 Pages
    1 2 3
    • Replies: 20
    • Views: 5,342
    April 25th, 2017, 11:38 PM Go to last post
  25. Arria 10 - Ubuntu - make error for Uboot

    Started by lemonoje, April 25th, 2017 11:58 AM
    • Replies: 0
    • Views: 1,119
    April 25th, 2017, 11:58 AM Go to last post
  26. HPS Configuration in QSys: Why is hps_io exported?

    Started by DrTobbe, April 13th, 2017 06:29 AM
    hps, pin muxing, qsys
    • Replies: 3
    • Views: 1,834
    April 25th, 2017, 08:30 AM Go to last post
  27. FPGA-to-HPS SDRAM Interface Problem

    Started by helekjo, April 20th, 2017 04:31 AM
    • Replies: 1
    • Views: 1,430
    April 24th, 2017, 02:04 AM Go to last post
  28. Cyclone V SoC - Shared Memory Controller

    Started by Taz1984, July 15th, 2013 10:20 PM
    6 Pages
    1 2 3 ... 6
    • Replies: 51
    • Views: 59,740
    April 15th, 2017, 01:25 AM Go to last post

Thread Display Options

Use this control to limit the display of threads to those newer than the specified time frame.

Allows you to choose the data by which the thread list will be sorted.

Order threads in...

Note: when sorting by date, 'descending order' will show the newest results first.

Icon Legend

Contains unread posts
Contains unread posts
Contains no unread posts
Contains no unread posts
More than 15 replies or 150 views
Hot thread with unread posts
More than 15 replies or 150 views
Hot thread with no unread posts
Closed Thread
Thread is closed
Thread Contains a Message Written By You
You have posted in this thread

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •