Results 1 to 2 of 2

Thread: DE0-NANO Board SDC file and PLL

  1. #1
    Join Date
    Aug 2016
    Posts
    36
    Rep Power
    1

    Default DE0-NANO Board SDC file and PLL

    Hallo

    I have a DE0-NANO board. There is a on board 50 MHz oscillator on the board which works as the clock to the FPGA. Now suppose i want to run my design at 30 MHz. So i write a SDC file like the following, would this work? I mean would this already create a pll which will run my design at 33 MHz when i download it on the FPGA?

    # Constrain clock port clk with a 30-ns requirement


    create_clock -period 33 [get_ports clk]


    # Automatically apply a generate clock on the output of phase-locked loops (PLLs)
    # This command can be safely left in the SDC even if no PLLs exist in the design


    derive_pll_clocks


    derive_clock_uncertainty


    # Constrain the input I/O path


    set_input_delay -clock clk -max 0.5 [all_inputs]


    set_input_delay -clock clk -min 0.1 [all_inputs]


    # Constrain the output I/O path


    set_output_delay -clock clk -max 0.5 [all_outputs]


    set_output_delay -clock clk -min 0.1 [all_outputs]

  2. #2
    Join Date
    Sep 2013
    Location
    London
    Posts
    1,376
    Rep Power
    1

    Default Re: DE0-NANO Board SDC file and PLL

    Changing the SDC file will not change the FPGA design or the board or the behaviour of any of the components on the board. There is a fixed 50MHz oscillator on the Nano.

    If you want to run everything at 30MHz then you either need to de-solder 50MHz oscillator and replace it with a 30MHz part - don't do this - or, far more practically, use one of the PLLs in your FPGA to generate the 30MHz clock from the 50MHz. Use the IP catalogue in Quartus to locate a PLL and configure it to your needs. Then instantiate it in your design.

    The 'derive_pll_clocks' in your SDC file will then deal with everything required to check that the design will run at the revised frequency.

    Cheers,
    Alex

Similar Threads

  1. Using PLL in the DE NANO Board
    By shauk in forum Development Kit Related
    Replies: 0
    Last Post: April 17th, 2017, 10:46 PM
  2. FFT in DE0 Nano board
    By a0079700@u.nus.edu in forum Development Kit Related
    Replies: 2
    Last Post: August 16th, 2016, 01:46 AM
  3. cheap DE0 NANO SOC and DE0 NANO expansion board (CAPE) for altera forum members
    By nachodizz990 in forum General Altera Discussion
    Replies: 5
    Last Post: April 28th, 2016, 06:48 AM
  4. Deo nano board help!
    By pohyee in forum IP Discussion
    Replies: 3
    Last Post: October 2nd, 2013, 11:30 AM
  5. using vga controller of de0 board in de0 nano board
    By jagadeeshj in forum University Program
    Replies: 0
    Last Post: September 17th, 2013, 08:26 AM

Bookmarks

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •