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Thread: Compare two byte arrays

  1. #1
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    Default Compare two byte arrays

    I have a list of commands and a command received from UART.
    Code:
    type commands is array(0 to COM_SIZE) of std_logic_vector(7 downto 0);
    
    signal commands_list : commands(0 to COM_COUNT) := 
    (
        x"73746F700000", --stop
        x"667764000000", --fwd
        x"726576000000"  --rev
        
    );
    
    type com_str is array (0 to COM_SIZE) of std_logic_vector(7 downto 0);
    
    signal command : com_str;
    I try to compare the hole array
    Code:
    for i in 0 to COM_COUNT loop
        if (commands_list(i) /=  command) then
            --do something
        end if;
    end loop;
    And every byte
    Code:
    for i in 0 to COM_COUNT loop
        for j in 0 to name_len loop    
            if (commands_list(i)(j) /=  command(j)) then
                --do something
            end if;
        end loop;      
    end loop;
    In both cases I get an error
    Error (10327): VHDL error at parser.vhd(253): can't determine definition of operator ""/="" -- found 0 possible definitions

  2. #2
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    Default Re: Compare two byte arrays

    In the first case, you're comparing a std_logic_vector to an array of std_logic_vector. Doesn't work.

    In the 2nd case, you're comparing a std_logic to a std_logic_vector. Doesn't work either.

    I assume the problem is that the type of com_str is wrong. I guess it should really be this:
    Code:
    signal command: std_logic_vector(7 downto 0);
    That would, from the context, make more sense to me.

  3. #3
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    Default Re: Compare two byte arrays

    Quote Originally Posted by GooGooCluster View Post
    In the first case, you're comparing a std_logic_vector to an array of std_logic_vector. Doesn't work.

    In the 2nd case, you're comparing a std_logic to a std_logic_vector. Doesn't work either.

    I assume the problem is that the type of com_str is wrong. I guess it should really be this:
    Code:
    signal command: std_logic_vector(7 downto 0);
    That would, from the context, make more sense to me.
    'command' is not a char - it's array of chars. this way - command: std_logic_vector(7 downto 0); - it holds only one char, and I need to get array of chars from terminal.

  4. #4
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    Default Re: Compare two byte arrays

    Ah, now I understand. So, a "char" in your case is supposed to be a std_logic_vector with 8 bits, right?

    But then, "commands" should be an array of array of std_logic_vector(7 downto 0). You're missing one level of arrays. You try to initialize a std_logic_vector(7 downto 0) with "x"73746F700000", where "73746F700000" is 48 bits. I wonder why the compiler doesn't complain, but you have to fix that first.

  5. #5
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    Default Re: Compare two byte arrays

    Quote Originally Posted by GooGooCluster View Post
    Ah, now I understand. So, a "char" in your case is supposed to be a std_logic_vector with 8 bits, right?

    But then, "commands" should be an array of array of std_logic_vector(7 downto 0). You're missing one level of arrays. You try to initialize a std_logic_vector(7 downto 0) with "x"73746F700000", where "73746F700000" is 48 bits. I wonder why the compiler doesn't complain, but you have to fix that first.
    Yes. You are right. I need array of array - each member of array is array of chars - a command in the list. But how I should initialize it?

    type commands is array(0 to 6) of std_logic_vector(7 downto 0);

    signal commands_list : commands(0 to 2) :=
    (
    x"73746F700000", --stop
    x"667764000000", --fwd
    x"726576000000" --rev
    );

    if array(0 to 6) then x"73746F700000" is 7 elements 73 74 6F 70 00 00 00.

    I was trying this way
    Code:
    signal commands_list : commands_l(2 downto 0) := (
        0 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21"), --stop
        1 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21"), --fwd
        2 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21")  --rev
        );
    But I get an error
    Error (10515): VHDL type mismatch error at parser.vhd(71): std_ulogic type does not match string literal
    Last edited by john7; July 12th, 2017 at 02:07 AM.

  6. #6
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    Default Re: Compare two byte arrays

    I agree that your approach looks correct now.

    However, without seeing the complete code, I cannot tell what's wrong. I have no clue what line 71 is, and I have no clue how the signals and types that are references in that line are declared. Keep that in mind before posting anything else.

    Anyway, here's some code that passes synthesis, and should give you the right pointers:
    Code:
    type command_type is array(0 to 5) of std_logic_vector(7 downto 0);
    type commands_type is array(0 to 2) of command_type;
    signal commands: commands_type := (
    	0 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21"), --stop
    	1 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21"), --fwd
    	2 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21")  --rev
    );

  7. #7
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    Default Re: Compare two byte arrays

    Quote Originally Posted by GooGooCluster View Post
    I agree that your approach looks correct now.

    However, without seeing the complete code, I cannot tell what's wrong. I have no clue what line 71 is, and I have no clue how the signals and types that are references in that line are declared. Keep that in mind before posting anything else.

    Anyway, here's some code that passes synthesis, and should give you the right pointers:
    Code:
    type command_type is array(0 to 5) of std_logic_vector(7 downto 0);
    type commands_type is array(0 to 2) of command_type;
    signal commands: commands_type := (
        0 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21"), --stop
        1 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21"), --fwd
        2 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21")  --rev
    );
    The problem was different types. VHDL is very strict about it.
    This way it works
    Code:
    type str_t is array(integer range<>) of std_logic_vector(7 downto 0);
    type commands is array(integer range<>) of str_t(0 to COM_SIZE);
    
    constant commands_list : commands(0 to COM_COUNT) := 
    (
         0 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21"), --stop
        1 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21"), --fwd
        2 => (0 => x"00", 1 => x"01", 2 => x"10", 3 => x"11", 4 => x"20", 5 => x"21")  --rev
        
    );
    
    
    type rx_buff_str is array (0 to RX_BUF_SIZE-1) of std_logic_vector(7 downto 0);
    signal rx_uart_buf : rx_buff_str;
    
    signal rx_command : str_t(0 to COM_SIZE);
    
    ----------------------------------
    ---------------------------------
    ---------------------------------
    
    for i in 0 to COM_COUNT loop
      if (commands_list(i) /=  rx_command) then
      end if;
    end loop;

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